Commit 7adc4b39 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A few smaller fixes for v5.7-rc3: The majority are fixes for bugs I
  found after restarting my randconfig build testing that had been
  dormant for a while.

  On the Nokia N950/N9 phone, a DT fix is required to address a boot
  regression.

  For the bcm283x (Raspberry Pi), two DT fixes address minor issues"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  soc: imx8: select SOC_BUS
  soc: tegra: fix tegra_pmc_get_suspend_mode definition
  soc: fsl: dpio: avoid stack usage warning
  soc: fsl: dpio: fix incorrect pointer conversions
  ARM: imx: provide v7_cpu_resume() only on ARM_CPU_SUSPEND=y
  ARM: dts: bcm283x: Disable dsi0 node
  firmware: xilinx: make firmware_debugfs_root static
  drivers: soc: xilinx: fix firmware driver Kconfig dependency
  ARM: dts: bcm283x: Add cells encoding format to firmware bus
  ARM: dts: OMAP3: disable RNG on N950/N9
parents 1ddd8739 f42ae4cd
...@@ -14,6 +14,9 @@ act { ...@@ -14,6 +14,9 @@ act {
soc { soc {
firmware: firmware { firmware: firmware {
compatible = "raspberrypi,bcm2835-firmware", "simple-bus"; compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
mboxes = <&mailbox>; mboxes = <&mailbox>;
dma-ranges; dma-ranges;
}; };
......
...@@ -372,6 +372,7 @@ dsi0: dsi@7e209000 { ...@@ -372,6 +372,7 @@ dsi0: dsi@7e209000 {
"dsi0_ddr2", "dsi0_ddr2",
"dsi0_ddr"; "dsi0_ddr";
status = "disabled";
}; };
aux: aux@7e215000 { aux: aux@7e215000 {
......
...@@ -341,6 +341,11 @@ &mmc3 { ...@@ -341,6 +341,11 @@ &mmc3 {
status = "disabled"; status = "disabled";
}; };
/* RNG not directly accessible on N950/N9. */
&rng_target {
status = "disabled";
};
&usb_otg_hs { &usb_otg_hs {
interface-type = <0>; interface-type = <0>;
usb-phy = <&usb2_phy>; usb-phy = <&usb2_phy>;
......
...@@ -91,8 +91,10 @@ AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a ...@@ -91,8 +91,10 @@ AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
endif endif
ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SOC_IMX6) += resume-imx6.o obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
endif
obj-$(CONFIG_SOC_IMX6) += pm-imx6.o obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
obj-$(CONFIG_SOC_IMX1) += mach-imx1.o obj-$(CONFIG_SOC_IMX1) += mach-imx1.o
......
...@@ -35,7 +35,7 @@ static struct pm_api_info pm_api_list[] = { ...@@ -35,7 +35,7 @@ static struct pm_api_info pm_api_list[] = {
PM_API(PM_QUERY_DATA), PM_API(PM_QUERY_DATA),
}; };
struct dentry *firmware_debugfs_root; static struct dentry *firmware_debugfs_root;
/** /**
* zynqmp_pm_argument_value() - Extract argument value from a PM-API request * zynqmp_pm_argument_value() - Extract argument value from a PM-API request
......
...@@ -478,12 +478,18 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, ...@@ -478,12 +478,18 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d,
const struct dpaa2_fd *fd, const struct dpaa2_fd *fd,
int nb) int nb)
{ {
int i; struct qbman_eq_desc *ed;
struct qbman_eq_desc ed[32]; int i, ret;
ed = kcalloc(sizeof(struct qbman_eq_desc), 32, GFP_KERNEL);
if (!ed)
return -ENOMEM;
d = service_select(d); d = service_select(d);
if (!d) if (!d) {
return -ENODEV; ret = -ENODEV;
goto out;
}
for (i = 0; i < nb; i++) { for (i = 0; i < nb; i++) {
qbman_eq_desc_clear(&ed[i]); qbman_eq_desc_clear(&ed[i]);
...@@ -491,7 +497,10 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, ...@@ -491,7 +497,10 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d,
qbman_eq_desc_set_fq(&ed[i], fqid[i]); qbman_eq_desc_set_fq(&ed[i], fqid[i]);
} }
return qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb); ret = qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
out:
kfree(ed);
return ret;
} }
EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_desc_fq); EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_desc_fq);
......
...@@ -753,7 +753,7 @@ int qbman_swp_enqueue_multiple_mem_back(struct qbman_swp *s, ...@@ -753,7 +753,7 @@ int qbman_swp_enqueue_multiple_mem_back(struct qbman_swp *s,
if (!s->eqcr.available) { if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci; eqcr_ci = s->eqcr.ci;
p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK; p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
s->eqcr.ci = __raw_readl(p) & full_mask; s->eqcr.ci = *p & full_mask;
s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size, s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
eqcr_ci, s->eqcr.ci); eqcr_ci, s->eqcr.ci);
if (!s->eqcr.available) { if (!s->eqcr.available) {
...@@ -823,7 +823,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s, ...@@ -823,7 +823,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s,
const uint32_t *cl; const uint32_t *cl;
uint32_t eqcr_ci, eqcr_pi, half_mask, full_mask; uint32_t eqcr_ci, eqcr_pi, half_mask, full_mask;
int i, num_enqueued = 0; int i, num_enqueued = 0;
uint64_t addr_cena;
half_mask = (s->eqcr.pi_ci_mask>>1); half_mask = (s->eqcr.pi_ci_mask>>1);
full_mask = s->eqcr.pi_ci_mask; full_mask = s->eqcr.pi_ci_mask;
...@@ -867,7 +866,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s, ...@@ -867,7 +866,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s,
/* Flush all the cacheline without load/store in between */ /* Flush all the cacheline without load/store in between */
eqcr_pi = s->eqcr.pi; eqcr_pi = s->eqcr.pi;
addr_cena = (uint64_t)s->addr_cena;
for (i = 0; i < num_enqueued; i++) for (i = 0; i < num_enqueued; i++)
eqcr_pi++; eqcr_pi++;
s->eqcr.pi = eqcr_pi & full_mask; s->eqcr.pi = eqcr_pi & full_mask;
...@@ -901,7 +899,7 @@ int qbman_swp_enqueue_multiple_desc_mem_back(struct qbman_swp *s, ...@@ -901,7 +899,7 @@ int qbman_swp_enqueue_multiple_desc_mem_back(struct qbman_swp *s,
if (!s->eqcr.available) { if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci; eqcr_ci = s->eqcr.ci;
p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK; p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
s->eqcr.ci = __raw_readl(p) & full_mask; s->eqcr.ci = *p & full_mask;
s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size, s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
eqcr_ci, s->eqcr.ci); eqcr_ci, s->eqcr.ci);
if (!s->eqcr.available) if (!s->eqcr.available)
......
...@@ -21,6 +21,7 @@ config SOC_IMX8M ...@@ -21,6 +21,7 @@ config SOC_IMX8M
bool "i.MX8M SoC family support" bool "i.MX8M SoC family support"
depends on ARCH_MXC || COMPILE_TEST depends on ARCH_MXC || COMPILE_TEST
default ARCH_MXC && ARM64 default ARCH_MXC && ARM64
select SOC_BUS
help help
If you say yes here you get support for the NXP i.MX8M family If you say yes here you get support for the NXP i.MX8M family
support, it will provide the SoC info like SoC family, support, it will provide the SoC info like SoC family,
......
...@@ -19,7 +19,7 @@ config XILINX_VCU ...@@ -19,7 +19,7 @@ config XILINX_VCU
config ZYNQMP_POWER config ZYNQMP_POWER
bool "Enable Xilinx Zynq MPSoC Power Management driver" bool "Enable Xilinx Zynq MPSoC Power Management driver"
depends on PM && ARCH_ZYNQMP depends on PM && ZYNQMP_FIRMWARE
default y default y
select MAILBOX select MAILBOX
select ZYNQMP_IPI_MBOX select ZYNQMP_IPI_MBOX
...@@ -35,7 +35,7 @@ config ZYNQMP_POWER ...@@ -35,7 +35,7 @@ config ZYNQMP_POWER
config ZYNQMP_PM_DOMAINS config ZYNQMP_PM_DOMAINS
bool "Enable Zynq MPSoC generic PM domains" bool "Enable Zynq MPSoC generic PM domains"
default y default y
depends on PM && ARCH_ZYNQMP && ZYNQMP_FIRMWARE depends on PM && ZYNQMP_FIRMWARE
select PM_GENERIC_DOMAINS select PM_GENERIC_DOMAINS
help help
Say yes to enable device power management through PM domains Say yes to enable device power management through PM domains
......
...@@ -168,7 +168,6 @@ int tegra_io_pad_power_disable(enum tegra_io_pad id); ...@@ -168,7 +168,6 @@ int tegra_io_pad_power_disable(enum tegra_io_pad id);
int tegra_io_rail_power_on(unsigned int id); int tegra_io_rail_power_on(unsigned int id);
int tegra_io_rail_power_off(unsigned int id); int tegra_io_rail_power_off(unsigned int id);
enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void);
void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode); void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode);
void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode); void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode);
...@@ -220,11 +219,6 @@ static inline int tegra_io_rail_power_off(unsigned int id) ...@@ -220,11 +219,6 @@ static inline int tegra_io_rail_power_off(unsigned int id)
return -ENOSYS; return -ENOSYS;
} }
static inline enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
{
return TEGRA_SUSPEND_NONE;
}
static inline void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode) static inline void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode)
{ {
} }
...@@ -235,4 +229,13 @@ static inline void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode) ...@@ -235,4 +229,13 @@ static inline void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode)
#endif /* CONFIG_SOC_TEGRA_PMC */ #endif /* CONFIG_SOC_TEGRA_PMC */
#if defined(CONFIG_SOC_TEGRA_PMC) && defined(CONFIG_PM_SLEEP)
enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void);
#else
static inline enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
{
return TEGRA_SUSPEND_NONE;
}
#endif
#endif /* __SOC_TEGRA_PMC_H__ */ #endif /* __SOC_TEGRA_PMC_H__ */
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