drm/amd/display: Increase clock table size

[why&how]
To prevent out of bounds error, we need
to increase the clock table size.
Reviewed-by: Xi Liu <xi.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c

@@ -29,10 +29,7 @@
 #include "dml2_translation_helper.h"
 
 #define NUM_DCFCLK_STAS 5
-
-#if defined(CONFIG_DRM_AMD_DC_DCN3_51)
 #define NUM_DCFCLK_STAS_NEW 8
-#endif
 
 void dml2_init_ip_params(struct dml2_context *dml2, const struct dc *in_dc, struct ip_params_st *out)
 {
@@ -258,21 +255,20 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,
 	struct dml2_policy_build_synthetic_soc_states_scratch *s = &dml2->v20.scratch.create_scratch.build_synthetic_socbb_scratch;
 	struct dml2_policy_build_synthetic_soc_states_params *p = &dml2->v20.scratch.build_synthetic_socbb_params;
 	unsigned int dcfclk_stas_mhz[NUM_DCFCLK_STAS];
-#if defined(CONFIG_DRM_AMD_DC_DCN3_51)
 	unsigned int dcfclk_stas_mhz_new[NUM_DCFCLK_STAS_NEW];
 	unsigned int dml_project = dml2->v20.dml_core_ctx.project;
-#endif
+
 	unsigned int i = 0;
 	unsigned int transactions_per_mem_clock = 16; // project specific, depends on used Memory type
 
-	p->dcfclk_stas_mhz = dcfclk_stas_mhz;
-	p->num_dcfclk_stas = NUM_DCFCLK_STAS;
-#if defined(CONFIG_DRM_AMD_DC_DCN3_51)
 	if (dml_project == dml_project_dcn351) {
 		p->dcfclk_stas_mhz = dcfclk_stas_mhz_new;
 		p->num_dcfclk_stas = NUM_DCFCLK_STAS_NEW;
+	} else {
+		p->dcfclk_stas_mhz = dcfclk_stas_mhz;
+		p->num_dcfclk_stas = NUM_DCFCLK_STAS;
 	}
-#endif
+
 	p->in_bbox = in_bbox;
 	p->out_states = out;
 	p->in_states = &dml2->v20.scratch.create_scratch.in_states;