Commit 7cdfb7a5 authored by Johan Hovold's avatar Johan Hovold Committed by Bjorn Andersson

arm64: dts: qcom: sc8280xp: drop broken DP PHY nodes

The DP PHY register layout of the current binding do not apply to the
newer USB4/USB3/DP PHY which uses a different register layout entirely.

Drop the DP PHY subnodes until the binding has been updated to prevent
the driver from corrupting unrelated registers.

Note that this is also needed in order to not break USB with an upcoming
PHY driver change that checks for overlapping register regions.

Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220919094454.1574-5-johan+linaro@kernel.org
parent 8723c3f2
......@@ -1191,16 +1191,6 @@ usb_0_ssphy: usb3-phy@88eb400 {
clock-names = "pipe0";
clock-output-names = "usb0_phy_pipe_clk_src";
};
usb_0_dpphy: dp-phy@88ed200 {
reg = <0 0x088ed200 0 0x200>,
<0 0x088ed400 0 0x200>,
<0 0x088eda00 0 0x200>,
<0 0x088ea600 0 0x200>,
<0 0x088ea800 0 0x200>;
#clock-cells = <1>;
#phy-cells = <0>;
};
};
usb_1_hsphy: phy@8902000 {
......@@ -1253,16 +1243,6 @@ usb_1_ssphy: usb3-phy@8903400 {
clock-names = "pipe0";
clock-output-names = "usb1_phy_pipe_clk_src";
};
usb_1_dpphy: dp-phy@8904200 {
reg = <0 0x08904200 0 0x200>,
<0 0x08904400 0 0x200>,
<0 0x08904a00 0 0x200>,
<0 0x08904600 0 0x200>,
<0 0x08904800 0 0x200>;
#clock-cells = <1>;
#phy-cells = <0>;
};
};
system-cache-controller@9200000 {
......
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