Commit 7d8e737d authored by Mark Rankilor's avatar Mark Rankilor Committed by Greg Kroah-Hartman

Staging: comedi: Fixed more long line lengths in comedi.h

This patches fixes some long line lengths in comedi.h from checkpatch.pl
Signed-off-by: default avatarMark Rankilor <reodge@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent b464f791
...@@ -267,7 +267,8 @@ ...@@ -267,7 +267,8 @@
* streaming input/output */ * streaming input/output */
INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006, INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006,
INSN_CONFIG_SET_COUNTER_MODE = 4097, INSN_CONFIG_SET_COUNTER_MODE = 4097,
INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, /* deprecated */ /* INSN_CONFIG_8254_SET_MODE is deprecated */
INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE,
INSN_CONFIG_8254_READ_STATUS = 4098, INSN_CONFIG_8254_READ_STATUS = 4098,
INSN_CONFIG_SET_ROUTING = 4099, INSN_CONFIG_SET_ROUTING = 4099,
INSN_CONFIG_GET_ROUTING = 4109, INSN_CONFIG_GET_ROUTING = 4109,
...@@ -598,14 +599,17 @@ ...@@ -598,14 +599,17 @@
NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3, NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3,
NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4, NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4,
NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5, NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5,
NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6, /* NI 660x-specific */ /* NI 660x-specific */
NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6,
NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7, NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7,
NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8, NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8,
NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9, NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9,
NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000, NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000,
NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0, NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0,
NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000, /* divide source by 2 */ /* divide source by 2 */
NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, /* divide source by 8 */ NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000,
/* divide source by 8 */
NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000,
NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000 NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
}; };
static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n) static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n)
...@@ -837,7 +841,8 @@ INSN_CONFIG_ARM */ ...@@ -837,7 +841,8 @@ INSN_CONFIG_ARM */
{ {
return NI_USUAL_PFI_SELECT(pfi_channel); return NI_USUAL_PFI_SELECT(pfi_channel);
} }
static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel) static inline unsigned
NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel)
{ {
return NI_USUAL_RTSI_SELECT(rtsi_channel); return NI_USUAL_RTSI_SELECT(rtsi_channel);
} }
......
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