Commit 7e48b665 authored by Andrew Davis's avatar Andrew Davis Committed by Nishanth Menon

arm64: dts: ti: k3-j721e: Enable Mailbox nodes at the board level

Mailbox nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with a chosen interrupt
and connection to a remote processor.

As the remote processors depend on memory nodes which are only known at
the board integration level, these nodes should only be enabled when
provided with the above information.

Disable the Mailbox nodes in the dtsi files and only enable the ones that
are actually used on a given board.
Signed-off-by: default avatarAndrew Davis <afd@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Reviewed-by: default avatarBryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20221020160305.18711-9-afd@ti.com
parent 0e63f35a
...@@ -176,6 +176,7 @@ mailbox0_cluster0: mailbox@31f80000 { ...@@ -176,6 +176,7 @@ mailbox0_cluster0: mailbox@31f80000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster1: mailbox@31f81000 { mailbox0_cluster1: mailbox@31f81000 {
...@@ -185,6 +186,7 @@ mailbox0_cluster1: mailbox@31f81000 { ...@@ -185,6 +186,7 @@ mailbox0_cluster1: mailbox@31f81000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster2: mailbox@31f82000 { mailbox0_cluster2: mailbox@31f82000 {
...@@ -194,6 +196,7 @@ mailbox0_cluster2: mailbox@31f82000 { ...@@ -194,6 +196,7 @@ mailbox0_cluster2: mailbox@31f82000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster3: mailbox@31f83000 { mailbox0_cluster3: mailbox@31f83000 {
...@@ -203,6 +206,7 @@ mailbox0_cluster3: mailbox@31f83000 { ...@@ -203,6 +206,7 @@ mailbox0_cluster3: mailbox@31f83000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster4: mailbox@31f84000 { mailbox0_cluster4: mailbox@31f84000 {
...@@ -212,6 +216,7 @@ mailbox0_cluster4: mailbox@31f84000 { ...@@ -212,6 +216,7 @@ mailbox0_cluster4: mailbox@31f84000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster5: mailbox@31f85000 { mailbox0_cluster5: mailbox@31f85000 {
...@@ -221,6 +226,7 @@ mailbox0_cluster5: mailbox@31f85000 { ...@@ -221,6 +226,7 @@ mailbox0_cluster5: mailbox@31f85000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster6: mailbox@31f86000 { mailbox0_cluster6: mailbox@31f86000 {
...@@ -230,6 +236,7 @@ mailbox0_cluster6: mailbox@31f86000 { ...@@ -230,6 +236,7 @@ mailbox0_cluster6: mailbox@31f86000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster7: mailbox@31f87000 { mailbox0_cluster7: mailbox@31f87000 {
...@@ -239,6 +246,7 @@ mailbox0_cluster7: mailbox@31f87000 { ...@@ -239,6 +246,7 @@ mailbox0_cluster7: mailbox@31f87000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster8: mailbox@31f88000 { mailbox0_cluster8: mailbox@31f88000 {
...@@ -248,6 +256,7 @@ mailbox0_cluster8: mailbox@31f88000 { ...@@ -248,6 +256,7 @@ mailbox0_cluster8: mailbox@31f88000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster9: mailbox@31f89000 { mailbox0_cluster9: mailbox@31f89000 {
...@@ -257,6 +266,7 @@ mailbox0_cluster9: mailbox@31f89000 { ...@@ -257,6 +266,7 @@ mailbox0_cluster9: mailbox@31f89000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster10: mailbox@31f8a000 { mailbox0_cluster10: mailbox@31f8a000 {
...@@ -266,6 +276,7 @@ mailbox0_cluster10: mailbox@31f8a000 { ...@@ -266,6 +276,7 @@ mailbox0_cluster10: mailbox@31f8a000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
mailbox0_cluster11: mailbox@31f8b000 { mailbox0_cluster11: mailbox@31f8b000 {
...@@ -275,6 +286,7 @@ mailbox0_cluster11: mailbox@31f8b000 { ...@@ -275,6 +286,7 @@ mailbox0_cluster11: mailbox@31f8b000 {
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>; ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>; interrupt-parent = <&main_navss_intr>;
status = "disabled";
}; };
main_ringacc: ringacc@3c000000 { main_ringacc: ringacc@3c000000 {
......
...@@ -883,6 +883,7 @@ &ufs_wrapper { ...@@ -883,6 +883,7 @@ &ufs_wrapper {
}; };
&mailbox0_cluster0 { &mailbox0_cluster0 {
status = "okay";
interrupts = <436>; interrupts = <436>;
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
...@@ -897,6 +898,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { ...@@ -897,6 +898,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
}; };
&mailbox0_cluster1 { &mailbox0_cluster1 {
status = "okay";
interrupts = <432>; interrupts = <432>;
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
...@@ -911,6 +913,7 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { ...@@ -911,6 +913,7 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
}; };
&mailbox0_cluster2 { &mailbox0_cluster2 {
status = "okay";
interrupts = <428>; interrupts = <428>;
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
...@@ -925,6 +928,7 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { ...@@ -925,6 +928,7 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
}; };
&mailbox0_cluster3 { &mailbox0_cluster3 {
status = "okay";
interrupts = <424>; interrupts = <424>;
mbox_c66_0: mbox-c66-0 { mbox_c66_0: mbox-c66-0 {
...@@ -939,6 +943,7 @@ mbox_c66_1: mbox-c66-1 { ...@@ -939,6 +943,7 @@ mbox_c66_1: mbox-c66-1 {
}; };
&mailbox0_cluster4 { &mailbox0_cluster4 {
status = "okay";
interrupts = <420>; interrupts = <420>;
mbox_c71_0: mbox-c71-0 { mbox_c71_0: mbox-c71-0 {
...@@ -947,34 +952,6 @@ mbox_c71_0: mbox-c71-0 { ...@@ -947,34 +952,6 @@ mbox_c71_0: mbox-c71-0 {
}; };
}; };
&mailbox0_cluster5 {
status = "disabled";
};
&mailbox0_cluster6 {
status = "disabled";
};
&mailbox0_cluster7 {
status = "disabled";
};
&mailbox0_cluster8 {
status = "disabled";
};
&mailbox0_cluster9 {
status = "disabled";
};
&mailbox0_cluster10 {
status = "disabled";
};
&mailbox0_cluster11 {
status = "disabled";
};
&mcu_r5fss0_core0 { &mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>, memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
......
...@@ -186,6 +186,7 @@ flash@0 { ...@@ -186,6 +186,7 @@ flash@0 {
}; };
&mailbox0_cluster0 { &mailbox0_cluster0 {
status = "okay";
interrupts = <436>; interrupts = <436>;
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
...@@ -200,6 +201,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { ...@@ -200,6 +201,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
}; };
&mailbox0_cluster1 { &mailbox0_cluster1 {
status = "okay";
interrupts = <432>; interrupts = <432>;
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
...@@ -214,6 +216,7 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { ...@@ -214,6 +216,7 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
}; };
&mailbox0_cluster2 { &mailbox0_cluster2 {
status = "okay";
interrupts = <428>; interrupts = <428>;
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
...@@ -228,6 +231,7 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { ...@@ -228,6 +231,7 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
}; };
&mailbox0_cluster3 { &mailbox0_cluster3 {
status = "okay";
interrupts = <424>; interrupts = <424>;
mbox_c66_0: mbox-c66-0 { mbox_c66_0: mbox-c66-0 {
...@@ -242,6 +246,7 @@ mbox_c66_1: mbox-c66-1 { ...@@ -242,6 +246,7 @@ mbox_c66_1: mbox-c66-1 {
}; };
&mailbox0_cluster4 { &mailbox0_cluster4 {
status = "okay";
interrupts = <420>; interrupts = <420>;
mbox_c71_0: mbox-c71-0 { mbox_c71_0: mbox-c71-0 {
...@@ -250,34 +255,6 @@ mbox_c71_0: mbox-c71-0 { ...@@ -250,34 +255,6 @@ mbox_c71_0: mbox-c71-0 {
}; };
}; };
&mailbox0_cluster5 {
status = "disabled";
};
&mailbox0_cluster6 {
status = "disabled";
};
&mailbox0_cluster7 {
status = "disabled";
};
&mailbox0_cluster8 {
status = "disabled";
};
&mailbox0_cluster9 {
status = "disabled";
};
&mailbox0_cluster10 {
status = "disabled";
};
&mailbox0_cluster11 {
status = "disabled";
};
&mcu_r5fss0_core0 { &mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>, memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
......
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