Commit 80cac47b authored by Ajish Koshy's avatar Ajish Koshy Committed by Martin K. Petersen

scsi: pm80xx: Handle non-fatal errors

Firmware expects host driver to clear scratchpad rsvd 0 register after
non-fatal error is found.

This is done when firmware raises fatal error interrupt and indicates
non-fatal error. At this point firmware updates scratchpad rsvd 0 register
with non-fatal error value. Here host has to clear the register after
reading it during non-fatal errors.

Rename:

 - MSGU_HOST_SCRATCH_PAD_6 to MSGU_SCRATCH_PAD_RSVD_0

 - MSGU_HOST_SCRATCH_PAD_7 to MSGU_SCRATCH_PAD_RSVD_1

Link: https://lore.kernel.org/r/20220222092618.108198-1-Ajish.Koshy@microchip.comReviewed-by: default avatarDamien Le Moal <damien.lemoal@opensource.wdc.com>
Acked-by: default avatarJack Wang <jinpu.wang@ionos.com>
Signed-off-by: default avatarAjish Koshy <Ajish.Koshy@microchip.com>
Signed-off-by: default avatarViswas G <Viswas.G@microchip.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 55a94551
......@@ -1544,9 +1544,9 @@ pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha)
{
int ret = 0;
u32 scratch_pad_rsvd0 = pm8001_cr32(pm8001_ha, 0,
MSGU_HOST_SCRATCH_PAD_6);
MSGU_SCRATCH_PAD_RSVD_0);
u32 scratch_pad_rsvd1 = pm8001_cr32(pm8001_ha, 0,
MSGU_HOST_SCRATCH_PAD_7);
MSGU_SCRATCH_PAD_RSVD_1);
u32 scratch_pad1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
u32 scratch_pad2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
u32 scratch_pad3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3);
......@@ -1655,9 +1655,9 @@ pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha)
PCI_VENDOR_ID_ATTO &&
pm8001_ha->pdev->subsystem_vendor != 0) {
ibutton0 = pm8001_cr32(pm8001_ha, 0,
MSGU_HOST_SCRATCH_PAD_6);
MSGU_SCRATCH_PAD_RSVD_0);
ibutton1 = pm8001_cr32(pm8001_ha, 0,
MSGU_HOST_SCRATCH_PAD_7);
MSGU_SCRATCH_PAD_RSVD_1);
if (!ibutton0 && !ibutton1) {
pm8001_dbg(pm8001_ha, FAIL,
"iButton Feature is not Available!!!\n");
......@@ -4064,9 +4064,9 @@ static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha)
pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n",
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5));
pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n",
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_RSVD_0));
pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n",
pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7));
pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_RSVD_1));
}
static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec)
......@@ -4100,6 +4100,22 @@ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec)
pm8001_handle_event(pm8001_ha, NULL, IO_FATAL_ERROR);
print_scratchpad_registers(pm8001_ha);
return ret;
} else {
/*read scratchpad rsvd 0 register*/
regval = pm8001_cr32(pm8001_ha, 0,
MSGU_SCRATCH_PAD_RSVD_0);
switch (regval) {
case NON_FATAL_SPBC_LBUS_ECC_ERR:
case NON_FATAL_BDMA_ERR:
case NON_FATAL_THERM_OVERTEMP_ERR:
/*Clear the register*/
pm8001_cw32(pm8001_ha, 0,
MSGU_SCRATCH_PAD_RSVD_0,
0x00000000);
break;
default:
break;
}
}
}
circularQ = &pm8001_ha->outbnd_q_tbl[vec];
......
......@@ -1366,8 +1366,8 @@ typedef struct SASProtocolTimerConfig SASProtocolTimerConfig_t;
#define MSGU_HOST_SCRATCH_PAD_3 0x60
#define MSGU_HOST_SCRATCH_PAD_4 0x64
#define MSGU_HOST_SCRATCH_PAD_5 0x68
#define MSGU_HOST_SCRATCH_PAD_6 0x6C
#define MSGU_HOST_SCRATCH_PAD_7 0x70
#define MSGU_SCRATCH_PAD_RSVD_0 0x6C
#define MSGU_SCRATCH_PAD_RSVD_1 0x70
#define MSGU_SCRATCHPAD1_RAAE_STATE_ERR(x) ((x & 0x3) == 0x2)
#define MSGU_SCRATCHPAD1_ILA_STATE_ERR(x) (((x >> 2) & 0x3) == 0x2)
......@@ -1439,6 +1439,11 @@ typedef struct SASProtocolTimerConfig SASProtocolTimerConfig_t;
#define SCRATCH_PAD_ERROR_MASK 0xFFFFFC00 /* Error mask bits */
#define SCRATCH_PAD_STATE_MASK 0x00000003 /* State Mask bits */
/*state definition for Scratchpad Rsvd 0, Offset 0x6C, Non-fatal*/
#define NON_FATAL_SPBC_LBUS_ECC_ERR 0x70000001
#define NON_FATAL_BDMA_ERR 0xE0000001
#define NON_FATAL_THERM_OVERTEMP_ERR 0x80000001
/* main configuration offset - byte offset */
#define MAIN_SIGNATURE_OFFSET 0x00 /* DWORD 0x00 */
#define MAIN_INTERFACE_REVISION 0x04 /* DWORD 0x01 */
......
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