Commit 815364d0 authored by Michael Walle's avatar Michael Walle Committed by Shawn Guo

arm64: dts: freescale: add Kontron sl28 support

Add device tree files for the Kontron SMARC-sAL28 board and its
carriers.
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 42ef961b
...@@ -4,6 +4,10 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb ...@@ -4,6 +4,10 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-oxalis.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-oxalis.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-kbox-a-230-ls.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3-ads2.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var4.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
......
// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree File for the Kontron KBox A-230-LS.
*
* This consists of a Kontron SMARC-sAL28 (Dual PHY) and a special
* carrier (s1914).
*
* Copyright (C) 2019 Michael Walle <michael@walle.cc>
*
*/
/dts-v1/;
#include "fsl-ls1028a-kontron-sl28-var4.dts"
/ {
model = "Kontron KBox A-230-LS";
compatible = "kontron,kbox-a-230-ls", "kontron,sl28-var4",
"kontron,sl28", "fsl,ls1028a";
};
&i2c4 {
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree file for the Kontron SMARC-sAL28 board on a SMARC Eval 2.0
* carrier (ADS2).
*
* Copyright (C) 2019 Michael Walle <michael@walle.cc>
*
*/
/dts-v1/;
#include "fsl-ls1028a-kontron-sl28.dts"
/ {
model = "Kontron SMARC-sAL28 (Single PHY) on SMARC Eval 2.0 carrier";
compatible = "kontron,sl28-var3-ads2", "kontron,sl28-var3",
"kontron,sl28", "fsl,ls1028a";
sound {
#address-cells = <1>;
#size-cells = <0>;
compatible = "simple-audio-card";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line Out Jack",
"Microphone", "Microphone Jack",
"Line", "Line In Jack";
simple-audio-card,routing =
"Line Out Jack", "LINEOUTR",
"Line Out Jack", "LINEOUTL",
"Headphone Jack", "HPOUTR",
"Headphone Jack", "HPOUTL",
"IN1L", "Line In Jack",
"IN1R", "Line In Jack",
"Microphone Jack", "MICBIAS",
"IN2L", "Microphone Jack",
"IN2R", "Microphone Jack";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,dai-link@0 {
reg = <0>;
bitclock-master = <&dailink0_master>;
frame-master = <&dailink0_master>;
format = "i2s";
cpu {
sound-dai = <&sai6>;
};
dailink0_master: codec {
sound-dai = <&wm8904>;
};
};
simple-audio-card,dai-link@1 {
reg = <1>;
bitclock-master = <&dailink1_master>;
frame-master = <&dailink1_master>;
format = "i2s";
cpu {
sound-dai = <&sai5>;
};
dailink1_master: codec {
sound-dai = <&wm8904>;
};
};
};
};
&i2c4 {
status = "okay";
wm8904: audio-codec@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8904";
reg = <0x1a>;
clocks = <&mclk>;
clock-names = "mclk";
assigned-clocks = <&mclk>;
assigned-clock-rates = <1250000>;
};
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
&sai5 {
status = "okay";
};
&sai6 {
status = "okay";
};
&soc {
mclk: clock-mclk@f130080 {
compatible = "fsl,vf610-sai-clock";
reg = <0x0 0xf130080 0x0 0x80>;
clocks = <&clockgen 4 1>;
#clock-cells = <0>;
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree file for the Kontron SMARC-sAL28 board.
*
* This is for the network variant 4 which has two ethernet ports. It
* extends the base and provides one more port connected via RGMII.
*
* Copyright (C) 2019 Michael Walle <michael@walle.cc>
*
*/
/dts-v1/;
#include "fsl-ls1028a-kontron-sl28.dts"
#include <dt-bindings/net/qca-ar803x.h>
/ {
model = "Kontron SMARC-sAL28 (Dual PHY)";
compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
};
&enetc_port1 {
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy1: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
vddio-supply = <&vddh>;
vddio: vddio-regulator {
regulator-name = "VDDIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddh: vddh-regulator {
regulator-name = "VDDH";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree file for the Kontron SMARC-sAL28 board.
*
* Copyright (C) 2019 Michael Walle <michael@walle.cc>
*
*/
/dts-v1/;
#include "fsl-ls1028a.dtsi"
/ {
model = "Kontron SMARC-sAL28";
compatible = "kontron,sl28", "fsl,ls1028a";
aliases {
crypto = &crypto;
serial0 = &duart0;
serial1 = &duart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&enetc_port0 {
phy-handle = <&phy0>;
phy-connection-type = "sgmii";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@5 {
reg = <0x5>;
eee-broken-1000t;
eee-broken-100tx;
};
};
};
&esdhc {
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
status = "okay";
};
&esdhc1 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
status = "okay";
};
&fspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
m25p,fast-read;
spi-max-frequency = <133000000>;
reg = <0>;
/* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */
spi-rx-bus-width = <2>; /* 2 SPI Rx lines */
spi-tx-bus-width = <1>; /* 1 SPI Tx line */
partition@0 {
reg = <0x000000 0x010000>;
label = "rcw";
read-only;
};
partition@10000 {
reg = <0x010000 0x0f0000>;
label = "failsafe bootloader";
read-only;
};
partition@100000 {
reg = <0x100000 0x040000>;
label = "failsafe DP firmware";
read-only;
};
partition@140000 {
reg = <0x140000 0x0a0000>;
label = "failsafe trusted firmware";
read-only;
};
partition@1e0000 {
reg = <0x1e0000 0x020000>;
label = "reserved";
read-only;
};
partition@200000 {
reg = <0x200000 0x010000>;
label = "configuration store";
};
partition@210000 {
reg = <0x210000 0x0f0000>;
label = "bootloader";
};
partition@300000 {
reg = <0x300000 0x040000>;
label = "DP firmware";
};
partition@340000 {
reg = <0x340000 0x0a0000>;
label = "trusted firmware";
};
partition@3e0000 {
reg = <0x3e0000 0x020000>;
label = "bootloader environment";
};
};
};
&gpio1 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "TDO", "TCK",
"", "", "", "", "", "", "", "";
};
&gpio2 {
gpio-line-names =
"", "", "", "", "", "", "TMS", "TDI",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&i2c0 {
status = "okay";
rtc@32 {
compatible = "microcrystal,rv8803";
reg = <0x32>;
};
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
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