Commit 819b5beb authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo

ARM: dts: imx7d-pico: Add LCD support

Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.
Signed-off-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarOtavio Salvador <otavio@ossystems.com.br>
Signed-off-by: default avatarJoris Offouga <offougajoris@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 99c2e379
...@@ -7,12 +7,42 @@ ...@@ -7,12 +7,42 @@
#include "imx7d.dtsi" #include "imx7d.dtsi"
/ { / {
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 50000 0>;
brightness-levels = <0 36 72 108 144 180 216 255>;
default-brightness-level = <6>;
};
/* Will be filled by the bootloader */ /* Will be filled by the bootloader */
memory@80000000 { memory@80000000 {
device_type = "memory"; device_type = "memory";
reg = <0x80000000 0>; reg = <0x80000000 0>;
}; };
panel {
compatible = "vxt,vl050-8048nt-c01";
backlight = <&backlight>;
power-supply = <&reg_lcd_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
reg_lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_lcdreg_on>;
regulator-name = "lcd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_wlreg_on: regulator-wlreg_on { reg_wlreg_on: regulator-wlreg_on {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -230,6 +260,18 @@ vgen6_reg: vldo4 { ...@@ -230,6 +260,18 @@ vgen6_reg: vldo4 {
}; };
}; };
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif>;
status = "okay";
port {
display_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
&sai1 { &sai1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>; pinctrl-0 = <&pinctrl_sai1>;
...@@ -260,6 +302,8 @@ &pwm3 { ...@@ -260,6 +302,8 @@ &pwm3 {
}; };
&pwm4 { /* Backlight */ &pwm4 { /* Backlight */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay"; status = "okay";
}; };
...@@ -413,6 +457,40 @@ MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f ...@@ -413,6 +457,40 @@ MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
>; >;
}; };
pinctrl_lcdif: lcdifgrp {
fsl,pins = <
MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79
MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79
MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79
MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79
MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79
MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79
MX7D_PAD_LCD_CLK__LCD_CLK 0x79
MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x78
MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x78
MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x78
MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14
>;
};
pinctrl_pwm1: pwm1 { pinctrl_pwm1: pwm1 {
fsl,pins = < fsl,pins = <
MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x7f MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x7f
...@@ -431,6 +509,12 @@ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x7f ...@@ -431,6 +509,12 @@ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x7f
>; >;
}; };
pinctrl_pwm4: pwm4grp{
fsl,pins = <
MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x7f
>;
};
pinctrl_reg_wlreg_on: regregongrp { pinctrl_reg_wlreg_on: regregongrp {
fsl,pins = < fsl,pins = <
MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59 MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59
...@@ -577,6 +661,12 @@ MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 0x7d ...@@ -577,6 +661,12 @@ MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 0x7d
>; >;
}; };
pinctrl_reg_lcdreg_on: reglcdongrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x59
>;
};
pinctrl_wdog: wdoggrp { pinctrl_wdog: wdoggrp {
fsl,pins = < fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
......
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