Commit 821ad23d authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar

cpuidle, intel_idle: Fix CPUIDLE_FLAG_INIT_XSTATE

Fix instrumentation bugs objtool found:

  vmlinux.o: warning: objtool: intel_idle_s2idle+0xd5: call to fpu_idle_fpregs() leaves .noinstr.text section
  vmlinux.o: warning: objtool: intel_idle_xstate+0x11: call to fpu_idle_fpregs() leaves .noinstr.text section
  vmlinux.o: warning: objtool: fpu_idle_fpregs+0x9: call to xfeatures_in_use() leaves .noinstr.text section
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Tested-by: default avatarTony Lindgren <tony@atomide.com>
Tested-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: default avatarFrederic Weisbecker <frederic@kernel.org>
Link: https://lore.kernel.org/r/20230112195540.494977795@infradead.org
parent 6d9c7f51
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
#define XCR_XFEATURE_ENABLED_MASK 0x00000000 #define XCR_XFEATURE_ENABLED_MASK 0x00000000
#define XCR_XFEATURE_IN_USE_MASK 0x00000001 #define XCR_XFEATURE_IN_USE_MASK 0x00000001
static inline u64 xgetbv(u32 index) static __always_inline u64 xgetbv(u32 index)
{ {
u32 eax, edx; u32 eax, edx;
...@@ -27,7 +27,7 @@ static inline void xsetbv(u32 index, u64 value) ...@@ -27,7 +27,7 @@ static inline void xsetbv(u32 index, u64 value)
* *
* Callers should check X86_FEATURE_XGETBV1. * Callers should check X86_FEATURE_XGETBV1.
*/ */
static inline u64 xfeatures_in_use(void) static __always_inline u64 xfeatures_in_use(void)
{ {
return xgetbv(XCR_XFEATURE_IN_USE_MASK); return xgetbv(XCR_XFEATURE_IN_USE_MASK);
} }
......
...@@ -295,7 +295,7 @@ static inline int enqcmds(void __iomem *dst, const void *src) ...@@ -295,7 +295,7 @@ static inline int enqcmds(void __iomem *dst, const void *src)
return 0; return 0;
} }
static inline void tile_release(void) static __always_inline void tile_release(void)
{ {
/* /*
* Instruction opcode for TILERELEASE; supported in binutils * Instruction opcode for TILERELEASE; supported in binutils
......
...@@ -853,12 +853,12 @@ int fpu__exception_code(struct fpu *fpu, int trap_nr) ...@@ -853,12 +853,12 @@ int fpu__exception_code(struct fpu *fpu, int trap_nr)
* Initialize register state that may prevent from entering low-power idle. * Initialize register state that may prevent from entering low-power idle.
* This function will be invoked from the cpuidle driver only when needed. * This function will be invoked from the cpuidle driver only when needed.
*/ */
void fpu_idle_fpregs(void) noinstr void fpu_idle_fpregs(void)
{ {
/* Note: AMX_TILE being enabled implies XGETBV1 support */ /* Note: AMX_TILE being enabled implies XGETBV1 support */
if (cpu_feature_enabled(X86_FEATURE_AMX_TILE) && if (cpu_feature_enabled(X86_FEATURE_AMX_TILE) &&
(xfeatures_in_use() & XFEATURE_MASK_XTILE)) { (xfeatures_in_use() & XFEATURE_MASK_XTILE)) {
tile_release(); tile_release();
fpregs_deactivate(&current->thread.fpu); __this_cpu_write(fpu_fpregs_owner_ctx, NULL);
} }
} }
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