Commit 823e7546 authored by Linus Walleij's avatar Linus Walleij

ARM: ux500: remove pointless cache setup complexity

This cleans out non-DT cache setup (the ux500 is DT only), and
sinks the l2cc base into the unlock function.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 922468cd
......@@ -7,17 +7,15 @@
#include <linux/io.h>
#include <linux/of.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
#include "db8500-regs.h"
#include "id.h"
static void __iomem *l2x0_base;
static int __init ux500_l2x0_unlock(void)
{
int i;
void __iomem *l2x0_base = __io_address(U8500_L2CC_BASE);
/*
* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
......@@ -45,23 +43,15 @@ static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
static int __init ux500_l2x0_init(void)
{
if (cpu_is_u8500_family() || cpu_is_ux540_family())
l2x0_base = __io_address(U8500_L2CC_BASE);
else
/* Non-Ux500 platform */
/* Multiplatform guard */
if (!((cpu_is_u8500_family() || cpu_is_ux540_family())))
return -ENODEV;
/* Unlock before init */
ux500_l2x0_unlock();
outer_cache.write_sec = ux500_l2c310_write_sec;
if (of_have_populated_dt())
l2x0_of_init(0, ~0);
else
l2x0_init(l2x0_base, 0, ~0);
l2x0_of_init(0, ~0);
return 0;
}
early_initcall(ux500_l2x0_init);
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