Commit 82c849eb authored by afzal mohammed's avatar afzal mohammed Committed by Thomas Gleixner

alpha: Replace setup_irq() by request_irq()

request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

setup_irq() was required in older kernels as the memory allocator was not
available during early boot.

Hence replace setup_irq() by request_irq().
Signed-off-by: default avatarafzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Acked-by: default avatarMatt Turner <mattst88@gmail.com>
Link: https://lkml.kernel.org/r/51f8ae7da9f47a23596388141933efa2bdef317b.1585320721.git.afzal.mohd.ma@gmail.com
parent 17e5888e
...@@ -213,32 +213,13 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr, ...@@ -213,32 +213,13 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr,
* The special RTC interrupt type. The interrupt itself was * The special RTC interrupt type. The interrupt itself was
* processed by PALcode, and comes in via entInt vector 1. * processed by PALcode, and comes in via entInt vector 1.
*/ */
struct irqaction timer_irqaction = {
.handler = rtc_timer_interrupt,
.name = "timer",
};
void __init void __init
init_rtc_irq(void) init_rtc_irq(irq_handler_t handler)
{ {
irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip, irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
handle_percpu_irq, "RTC"); handle_percpu_irq, "RTC");
setup_irq(RTC_IRQ, &timer_irqaction); if (!handler)
handler = rtc_timer_interrupt;
if (request_irq(RTC_IRQ, handler, 0, "timer", NULL))
pr_err("Failed to register timer interrupt\n");
} }
/* Dummy irqactions. */
struct irqaction isa_cascade_irqaction = {
.handler = no_action,
.name = "isa-cascade"
};
struct irqaction timer_cascade_irqaction = {
.handler = no_action,
.name = "timer-cascade"
};
struct irqaction halt_switch_irqaction = {
.handler = no_action,
.name = "halt-switch"
};
...@@ -82,11 +82,6 @@ struct irq_chip i8259a_irq_type = { ...@@ -82,11 +82,6 @@ struct irq_chip i8259a_irq_type = {
void __init void __init
init_i8259a_irqs(void) init_i8259a_irqs(void)
{ {
static struct irqaction cascade = {
.handler = no_action,
.name = "cascade",
};
long i; long i;
outb(0xff, 0x21); /* mask all of 8259A-1 */ outb(0xff, 0x21); /* mask all of 8259A-1 */
...@@ -96,7 +91,8 @@ init_i8259a_irqs(void) ...@@ -96,7 +91,8 @@ init_i8259a_irqs(void)
irq_set_chip_and_handler(i, &i8259a_irq_type, handle_level_irq); irq_set_chip_and_handler(i, &i8259a_irq_type, handle_level_irq);
} }
setup_irq(2, &cascade); if (request_irq(2, no_action, 0, "cascade", NULL))
pr_err("Failed to request irq 2 (cascade)\n");
} }
......
...@@ -21,14 +21,9 @@ extern void isa_no_iack_sc_device_interrupt(unsigned long); ...@@ -21,14 +21,9 @@ extern void isa_no_iack_sc_device_interrupt(unsigned long);
extern void srm_device_interrupt(unsigned long); extern void srm_device_interrupt(unsigned long);
extern void pyxis_device_interrupt(unsigned long); extern void pyxis_device_interrupt(unsigned long);
extern struct irqaction timer_irqaction;
extern struct irqaction isa_cascade_irqaction;
extern struct irqaction timer_cascade_irqaction;
extern struct irqaction halt_switch_irqaction;
extern void init_srm_irqs(long, unsigned long); extern void init_srm_irqs(long, unsigned long);
extern void init_pyxis_irqs(unsigned long); extern void init_pyxis_irqs(unsigned long);
extern void init_rtc_irq(void); extern void init_rtc_irq(irq_handler_t handler);
extern void common_init_isa_dma(void); extern void common_init_isa_dma(void);
......
...@@ -107,5 +107,6 @@ init_pyxis_irqs(unsigned long ignore_mask) ...@@ -107,5 +107,6 @@ init_pyxis_irqs(unsigned long ignore_mask)
irq_set_status_flags(i, IRQ_LEVEL); irq_set_status_flags(i, IRQ_LEVEL);
} }
setup_irq(16+7, &isa_cascade_irqaction); if (request_irq(16 + 7, no_action, 0, "isa-cascade", NULL))
pr_err("Failed to register isa-cascade interrupt\n");
} }
...@@ -133,7 +133,8 @@ alcor_init_irq(void) ...@@ -133,7 +133,8 @@ alcor_init_irq(void)
init_i8259a_irqs(); init_i8259a_irqs();
common_init_isa_dma(); common_init_isa_dma();
setup_irq(16+31, &isa_cascade_irqaction); if (request_irq(16 + 31, no_action, 0, "isa-cascade", NULL))
pr_err("Failed to register isa-cascade interrupt\n");
} }
......
...@@ -112,7 +112,8 @@ common_init_irq(void (*srm_dev_int)(unsigned long v)) ...@@ -112,7 +112,8 @@ common_init_irq(void (*srm_dev_int)(unsigned long v))
} }
common_init_isa_dma(); common_init_isa_dma();
setup_irq(16+4, &isa_cascade_irqaction); if (request_irq(16 + 4, no_action, 0, "isa-cascade", NULL))
pr_err("Failed to register isa-cascade interrupt\n");
} }
#ifndef CONFIG_ALPHA_PC164 #ifndef CONFIG_ALPHA_PC164
......
...@@ -123,7 +123,8 @@ eb64p_init_irq(void) ...@@ -123,7 +123,8 @@ eb64p_init_irq(void)
} }
common_init_isa_dma(); common_init_isa_dma();
setup_irq(16+5, &isa_cascade_irqaction); if (request_irq(16 + 5, no_action, 0, "isa-cascade", NULL))
pr_err("Failed to register isa-cascade interrupt\n");
} }
/* /*
......
...@@ -397,7 +397,7 @@ marvel_init_pci(void) ...@@ -397,7 +397,7 @@ marvel_init_pci(void)
static void __init static void __init
marvel_init_rtc(void) marvel_init_rtc(void)
{ {
init_rtc_irq(); init_rtc_irq(NULL);
} }
static void static void
......
...@@ -81,8 +81,10 @@ miata_init_irq(void) ...@@ -81,8 +81,10 @@ miata_init_irq(void)
init_pyxis_irqs(0x63b0000); init_pyxis_irqs(0x63b0000);
common_init_isa_dma(); common_init_isa_dma();
setup_irq(16+2, &halt_switch_irqaction); /* SRM only? */ if (request_irq(16 + 2, no_action, 0, "halt-switch", NULL))
setup_irq(16+6, &timer_cascade_irqaction); pr_err("Failed to register halt-switch interrupt\n");
if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL))
pr_err("Failed to register timer-cascade interrupt\n");
} }
......
...@@ -82,7 +82,8 @@ ruffian_init_rtc(void) ...@@ -82,7 +82,8 @@ ruffian_init_rtc(void)
outb(0x31, 0x42); outb(0x31, 0x42);
outb(0x13, 0x42); outb(0x13, 0x42);
setup_irq(0, &timer_irqaction); if (request_irq(0, rtc_timer_interrupt, 0, "timer", NULL))
pr_err("Failed to request irq 0 (timer)\n");
} }
static void static void
......
...@@ -106,7 +106,8 @@ rx164_init_irq(void) ...@@ -106,7 +106,8 @@ rx164_init_irq(void)
init_i8259a_irqs(); init_i8259a_irqs();
common_init_isa_dma(); common_init_isa_dma();
setup_irq(16+20, &isa_cascade_irqaction); if (request_irq(16 + 20, no_action, 0, "isa-cascade", NULL))
pr_err("Failed to register isa-cascade interrupt\n");
} }
......
...@@ -54,7 +54,8 @@ sx164_init_irq(void) ...@@ -54,7 +54,8 @@ sx164_init_irq(void)
else else
init_pyxis_irqs(0xff00003f0000UL); init_pyxis_irqs(0xff00003f0000UL);
setup_irq(16+6, &timer_cascade_irqaction); if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL))
pr_err("Failed to register timer-cascade interrupt\n");
} }
/* /*
......
...@@ -156,10 +156,6 @@ static void __init ...@@ -156,10 +156,6 @@ static void __init
wildfire_init_irq_per_pca(int qbbno, int pcano) wildfire_init_irq_per_pca(int qbbno, int pcano)
{ {
int i, irq_bias; int i, irq_bias;
static struct irqaction isa_enable = {
.handler = no_action,
.name = "isa_enable",
};
irq_bias = qbbno * (WILDFIRE_PCA_PER_QBB * WILDFIRE_IRQ_PER_PCA) irq_bias = qbbno * (WILDFIRE_PCA_PER_QBB * WILDFIRE_IRQ_PER_PCA)
+ pcano * WILDFIRE_IRQ_PER_PCA; + pcano * WILDFIRE_IRQ_PER_PCA;
...@@ -198,7 +194,8 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) ...@@ -198,7 +194,8 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
irq_set_status_flags(i + irq_bias, IRQ_LEVEL); irq_set_status_flags(i + irq_bias, IRQ_LEVEL);
} }
setup_irq(32+irq_bias, &isa_enable); if (request_irq(32 + irq_bias, no_action, 0, "isa_enable", NULL))
pr_err("Failed to register isa_enable interrupt\n");
} }
static void __init static void __init
......
...@@ -242,7 +242,7 @@ common_init_rtc(void) ...@@ -242,7 +242,7 @@ common_init_rtc(void)
outb(0x31, 0x42); outb(0x31, 0x42);
outb(0x13, 0x42); outb(0x13, 0x42);
init_rtc_irq(); init_rtc_irq(NULL);
} }
...@@ -396,9 +396,7 @@ time_init(void) ...@@ -396,9 +396,7 @@ time_init(void)
if (alpha_using_qemu) { if (alpha_using_qemu) {
clocksource_register_hz(&qemu_cs, NSEC_PER_SEC); clocksource_register_hz(&qemu_cs, NSEC_PER_SEC);
init_qemu_clockevent(); init_qemu_clockevent();
init_rtc_irq(qemu_timer_interrupt);
timer_irqaction.handler = qemu_timer_interrupt;
init_rtc_irq();
return; return;
} }
......
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