Commit 82d3d459 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding

ARM: tegra: ventana: Support CPU and Core voltage scaling

Support CPU and Core voltage scaling on Tegra20 Ventana board.
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent a38fd874
......@@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"
#include "tegra20-cpu-opp.dtsi"
#include "tegra20-cpu-opp-microvolt.dtsi"
/ {
model = "NVIDIA Tegra20 Ventana evaluation board";
......@@ -420,18 +421,28 @@ sys_reg: sys {
regulator-always-on;
};
sm0 {
vdd_core: sm0 {
regulator-name = "vdd_sm0,vdd_core";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1300000>;
regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
regulator-coupled-max-spread = <170000 550000>;
regulator-always-on;
regulator-boot-on;
nvidia,tegra-core-regulator;
};
sm1 {
vdd_cpu: sm1 {
regulator-name = "vdd_sm1,vdd_cpu";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1125000>;
regulator-coupled-with = <&vdd_core &rtc_vdd>;
regulator-coupled-max-spread = <550000 550000>;
regulator-always-on;
regulator-boot-on;
nvidia,tegra-cpu-regulator;
};
sm2_reg: sm2 {
......@@ -450,10 +461,16 @@ ldo1 {
regulator-always-on;
};
ldo2 {
rtc_vdd: ldo2 {
regulator-name = "vdd_ldo2,vdd_rtc";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1300000>;
regulator-coupled-with = <&vdd_core &vdd_cpu>;
regulator-coupled-max-spread = <170000 550000>;
regulator-always-on;
regulator-boot-on;
nvidia,tegra-rtc-regulator;
};
ldo3 {
......@@ -595,10 +612,12 @@ clk32k_in: clock@0 {
cpus {
cpu0: cpu@0 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
};
cpu@1 {
cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>;
};
};
......
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