Commit 8357d67f authored by David S. Miller's avatar David S. Miller

Merge branch 'r8169-next'

Heiner Kallweit says:

====================
r8169: remove support for few unused chip versions

There's a number of chip versions that apparently never made it to the
mass market. Detection of these chip versions has been disabled for
few kernel versions now and nobody complained. Therefore remove
support for these chip versions.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 1cd5ea44 efc37109
...@@ -51,20 +51,20 @@ enum mac_version { ...@@ -51,20 +51,20 @@ enum mac_version {
RTL_GIGA_MAC_VER_38, RTL_GIGA_MAC_VER_38,
RTL_GIGA_MAC_VER_39, RTL_GIGA_MAC_VER_39,
RTL_GIGA_MAC_VER_40, RTL_GIGA_MAC_VER_40,
RTL_GIGA_MAC_VER_41, /* support for RTL_GIGA_MAC_VER_41 has been removed */
RTL_GIGA_MAC_VER_42, RTL_GIGA_MAC_VER_42,
RTL_GIGA_MAC_VER_43, RTL_GIGA_MAC_VER_43,
RTL_GIGA_MAC_VER_44, RTL_GIGA_MAC_VER_44,
RTL_GIGA_MAC_VER_45, /* support for RTL_GIGA_MAC_VER_45 has been removed */
RTL_GIGA_MAC_VER_46, RTL_GIGA_MAC_VER_46,
RTL_GIGA_MAC_VER_47, /* support for RTL_GIGA_MAC_VER_47 has been removed */
RTL_GIGA_MAC_VER_48, RTL_GIGA_MAC_VER_48,
RTL_GIGA_MAC_VER_49, /* support for RTL_GIGA_MAC_VER_49 has been removed */
RTL_GIGA_MAC_VER_50, /* support for RTL_GIGA_MAC_VER_50 has been removed */
RTL_GIGA_MAC_VER_51, RTL_GIGA_MAC_VER_51,
RTL_GIGA_MAC_VER_52, RTL_GIGA_MAC_VER_52,
RTL_GIGA_MAC_VER_53, RTL_GIGA_MAC_VER_53,
RTL_GIGA_MAC_VER_60, /* support for RTL_GIGA_MAC_VER_60 has been removed */
RTL_GIGA_MAC_VER_61, RTL_GIGA_MAC_VER_61,
RTL_GIGA_MAC_VER_63, RTL_GIGA_MAC_VER_63,
RTL_GIGA_MAC_NONE RTL_GIGA_MAC_NONE
......
This diff is collapsed.
...@@ -793,71 +793,6 @@ static void rtl8168g_2_hw_phy_config(struct rtl8169_private *tp, ...@@ -793,71 +793,6 @@ static void rtl8168g_2_hw_phy_config(struct rtl8169_private *tp,
rtl8168g_config_eee_phy(phydev); rtl8168g_config_eee_phy(phydev);
} }
static void rtl8168h_1_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev)
{
u16 dout_tapbin;
u32 data;
r8169_apply_firmware(tp);
/* CHN EST parameters adjust - giga master */
r8168g_phy_param(phydev, 0x809b, 0xf800, 0x8000);
r8168g_phy_param(phydev, 0x80a2, 0xff00, 0x8000);
r8168g_phy_param(phydev, 0x80a4, 0xff00, 0x8500);
r8168g_phy_param(phydev, 0x809c, 0xff00, 0xbd00);
/* CHN EST parameters adjust - giga slave */
r8168g_phy_param(phydev, 0x80ad, 0xf800, 0x7000);
r8168g_phy_param(phydev, 0x80b4, 0xff00, 0x5000);
r8168g_phy_param(phydev, 0x80ac, 0xff00, 0x4000);
/* CHN EST parameters adjust - fnet */
r8168g_phy_param(phydev, 0x808e, 0xff00, 0x1200);
r8168g_phy_param(phydev, 0x8090, 0xff00, 0xe500);
r8168g_phy_param(phydev, 0x8092, 0xff00, 0x9f00);
/* enable R-tune & PGA-retune function */
dout_tapbin = 0;
data = phy_read_paged(phydev, 0x0a46, 0x13);
data &= 3;
data <<= 2;
dout_tapbin |= data;
data = phy_read_paged(phydev, 0x0a46, 0x12);
data &= 0xc000;
data >>= 14;
dout_tapbin |= data;
dout_tapbin = ~(dout_tapbin ^ 0x08);
dout_tapbin <<= 12;
dout_tapbin &= 0xf000;
r8168g_phy_param(phydev, 0x827a, 0xf000, dout_tapbin);
r8168g_phy_param(phydev, 0x827b, 0xf000, dout_tapbin);
r8168g_phy_param(phydev, 0x827c, 0xf000, dout_tapbin);
r8168g_phy_param(phydev, 0x827d, 0xf000, dout_tapbin);
r8168g_phy_param(phydev, 0x0811, 0x0000, 0x0800);
phy_modify_paged(phydev, 0x0a42, 0x16, 0x0000, 0x0002);
rtl8168g_enable_gphy_10m(phydev);
/* SAR ADC performance */
phy_modify_paged(phydev, 0x0bca, 0x17, BIT(12) | BIT(13), BIT(14));
r8168g_phy_param(phydev, 0x803f, 0x3000, 0x0000);
r8168g_phy_param(phydev, 0x8047, 0x3000, 0x0000);
r8168g_phy_param(phydev, 0x804f, 0x3000, 0x0000);
r8168g_phy_param(phydev, 0x8057, 0x3000, 0x0000);
r8168g_phy_param(phydev, 0x805f, 0x3000, 0x0000);
r8168g_phy_param(phydev, 0x8067, 0x3000, 0x0000);
r8168g_phy_param(phydev, 0x806f, 0x3000, 0x0000);
/* disable phy pfm mode */
phy_modify_paged(phydev, 0x0a44, 0x11, BIT(7), 0);
rtl8168g_disable_aldps(phydev);
rtl8168h_config_eee_phy(phydev);
}
static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp, static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev) struct phy_device *phydev)
{ {
...@@ -895,27 +830,6 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp, ...@@ -895,27 +830,6 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp,
rtl8168g_config_eee_phy(phydev); rtl8168g_config_eee_phy(phydev);
} }
static void rtl8168ep_1_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev)
{
/* Enable PHY auto speed down */
phy_modify_paged(phydev, 0x0a44, 0x11, 0, BIT(3) | BIT(2));
rtl8168g_phy_adjust_10m_aldps(phydev);
/* Enable EEE auto-fallback function */
phy_modify_paged(phydev, 0x0a4b, 0x11, 0, BIT(2));
/* Enable UC LPF tune function */
r8168g_phy_param(phydev, 0x8012, 0x0000, 0x8000);
/* set rg_sel_sdm_rate */
phy_modify_paged(phydev, 0x0c42, 0x11, BIT(13), BIT(14));
rtl8168g_disable_aldps(phydev);
rtl8168g_config_eee_phy(phydev);
}
static void rtl8168ep_2_hw_phy_config(struct rtl8169_private *tp, static void rtl8168ep_2_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev) struct phy_device *phydev)
{ {
...@@ -1081,44 +995,6 @@ static void rtl8125_legacy_force_mode(struct phy_device *phydev) ...@@ -1081,44 +995,6 @@ static void rtl8125_legacy_force_mode(struct phy_device *phydev)
phy_modify_paged(phydev, 0xa5b, 0x12, BIT(15), 0); phy_modify_paged(phydev, 0xa5b, 0x12, BIT(15), 0);
} }
static void rtl8125a_1_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev)
{
phy_modify_paged(phydev, 0xad4, 0x10, 0x03ff, 0x0084);
phy_modify_paged(phydev, 0xad4, 0x17, 0x0000, 0x0010);
phy_modify_paged(phydev, 0xad1, 0x13, 0x03ff, 0x0006);
phy_modify_paged(phydev, 0xad3, 0x11, 0x003f, 0x0006);
phy_modify_paged(phydev, 0xac0, 0x14, 0x0000, 0x1100);
phy_modify_paged(phydev, 0xac8, 0x15, 0xf000, 0x7000);
phy_modify_paged(phydev, 0xad1, 0x14, 0x0000, 0x0400);
phy_modify_paged(phydev, 0xad1, 0x15, 0x0000, 0x03ff);
phy_modify_paged(phydev, 0xad1, 0x16, 0x0000, 0x03ff);
r8168g_phy_param(phydev, 0x80ea, 0xff00, 0xc400);
r8168g_phy_param(phydev, 0x80eb, 0x0700, 0x0300);
r8168g_phy_param(phydev, 0x80f8, 0xff00, 0x1c00);
r8168g_phy_param(phydev, 0x80f1, 0xff00, 0x3000);
r8168g_phy_param(phydev, 0x80fe, 0xff00, 0xa500);
r8168g_phy_param(phydev, 0x8102, 0xff00, 0x5000);
r8168g_phy_param(phydev, 0x8105, 0xff00, 0x3300);
r8168g_phy_param(phydev, 0x8100, 0xff00, 0x7000);
r8168g_phy_param(phydev, 0x8104, 0xff00, 0xf000);
r8168g_phy_param(phydev, 0x8106, 0xff00, 0x6500);
r8168g_phy_param(phydev, 0x80dc, 0xff00, 0xed00);
r8168g_phy_param(phydev, 0x80df, 0x0000, 0x0100);
r8168g_phy_param(phydev, 0x80e1, 0x0100, 0x0000);
phy_modify_paged(phydev, 0xbf0, 0x13, 0x003f, 0x0038);
r8168g_phy_param(phydev, 0x819f, 0xffff, 0xd0b6);
phy_write_paged(phydev, 0xbc3, 0x12, 0x5555);
phy_modify_paged(phydev, 0xbf0, 0x15, 0x0e00, 0x0a00);
phy_modify_paged(phydev, 0xa5c, 0x10, 0x0400, 0x0000);
rtl8168g_enable_gphy_10m(phydev);
rtl8125a_config_eee_phy(phydev);
}
static void rtl8125a_2_hw_phy_config(struct rtl8169_private *tp, static void rtl8125a_2_hw_phy_config(struct rtl8169_private *tp,
struct phy_device *phydev) struct phy_device *phydev)
{ {
...@@ -1266,20 +1142,14 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev, ...@@ -1266,20 +1142,14 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
[RTL_GIGA_MAC_VER_38] = rtl8411_hw_phy_config, [RTL_GIGA_MAC_VER_38] = rtl8411_hw_phy_config,
[RTL_GIGA_MAC_VER_39] = rtl8106e_hw_phy_config, [RTL_GIGA_MAC_VER_39] = rtl8106e_hw_phy_config,
[RTL_GIGA_MAC_VER_40] = rtl8168g_1_hw_phy_config, [RTL_GIGA_MAC_VER_40] = rtl8168g_1_hw_phy_config,
[RTL_GIGA_MAC_VER_41] = NULL,
[RTL_GIGA_MAC_VER_42] = rtl8168g_2_hw_phy_config, [RTL_GIGA_MAC_VER_42] = rtl8168g_2_hw_phy_config,
[RTL_GIGA_MAC_VER_43] = rtl8168g_2_hw_phy_config, [RTL_GIGA_MAC_VER_43] = rtl8168g_2_hw_phy_config,
[RTL_GIGA_MAC_VER_44] = rtl8168g_2_hw_phy_config, [RTL_GIGA_MAC_VER_44] = rtl8168g_2_hw_phy_config,
[RTL_GIGA_MAC_VER_45] = rtl8168h_1_hw_phy_config,
[RTL_GIGA_MAC_VER_46] = rtl8168h_2_hw_phy_config, [RTL_GIGA_MAC_VER_46] = rtl8168h_2_hw_phy_config,
[RTL_GIGA_MAC_VER_47] = rtl8168h_1_hw_phy_config,
[RTL_GIGA_MAC_VER_48] = rtl8168h_2_hw_phy_config, [RTL_GIGA_MAC_VER_48] = rtl8168h_2_hw_phy_config,
[RTL_GIGA_MAC_VER_49] = rtl8168ep_1_hw_phy_config,
[RTL_GIGA_MAC_VER_50] = rtl8168ep_2_hw_phy_config,
[RTL_GIGA_MAC_VER_51] = rtl8168ep_2_hw_phy_config, [RTL_GIGA_MAC_VER_51] = rtl8168ep_2_hw_phy_config,
[RTL_GIGA_MAC_VER_52] = rtl8117_hw_phy_config, [RTL_GIGA_MAC_VER_52] = rtl8117_hw_phy_config,
[RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config, [RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config,
[RTL_GIGA_MAC_VER_60] = rtl8125a_1_hw_phy_config,
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config, [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config, [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
}; };
......
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