Commit 83688771 authored by Amber Lin's avatar Amber Lin Committed by Alex Deucher

drm/amdkfd: Enable HW_UPDATE_RPTR on GC 9.4.3

GC 9.4.3 uses the hardware to update AQL queues read pointer, so
remove CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK flag from MQD if it's
GC 9.4.3, and keep it for other existing gfx9 ASICs.
Signed-off-by: default avatarAmber Lin <Amber.Lin@amd.com>
Acked-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8855818c
...@@ -224,6 +224,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd, ...@@ -224,6 +224,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
struct queue_properties *q, struct queue_properties *q,
struct mqd_update_info *minfo) struct mqd_update_info *minfo)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)mm->dev->adev;
struct v9_mqd *m; struct v9_mqd *m;
m = get_mqd(mqd); m = get_mqd(mqd);
...@@ -269,10 +270,13 @@ static void update_mqd(struct mqd_manager *mm, void *mqd, ...@@ -269,10 +270,13 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
m->cp_hqd_vmid = q->vmid; m->cp_hqd_vmid = q->vmid;
if (q->format == KFD_QUEUE_FORMAT_AQL) { if (q->format == KFD_QUEUE_FORMAT_AQL) {
m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | m->cp_hqd_pq_control |=
2 << CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT | 2 << CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT |
1 << CP_HQD_PQ_CONTROL__QUEUE_FULL_EN__SHIFT | 1 << CP_HQD_PQ_CONTROL__QUEUE_FULL_EN__SHIFT |
1 << CP_HQD_PQ_CONTROL__WPP_CLAMP_EN__SHIFT; 1 << CP_HQD_PQ_CONTROL__WPP_CLAMP_EN__SHIFT;
if (adev->ip_versions[GC_HWIP][0] != IP_VERSION(9, 4, 3))
m->cp_hqd_pq_control |=
CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK;
m->cp_hqd_pq_doorbell_control |= 1 << m->cp_hqd_pq_doorbell_control |= 1 <<
CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT; CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT;
} }
......
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