Commit 8396bdc0 authored by Lubomir Rintel's avatar Lubomir Rintel Committed by Olof Johansson

ARM: dts: mmp3: Fix the TWSI ranges

The register blocks don't occupy 4K. In fact, some blocks are packed
close to others and assuming they're 4K causes overlaps:

  pxa2xx-i2c d4033800.i2c: can't request region for resource
    [mem 0xd4033800-0xd40347ff]

Link: https://lore.kernel.org/r/20191220071443.247183-1-lkundrak@v3.skSigned-off-by: default avatarLubomir Rintel <lkundrak@v3.sk>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 8bea5ac0
......@@ -356,7 +356,7 @@ gcb5: gpio@d4019108 {
twsi1: i2c@d4011000 {
compatible = "mrvl,mmp-twsi";
reg = <0xd4011000 0x1000>;
reg = <0xd4011000 0x70>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&soc_clocks MMP2_CLK_TWSI0>;
resets = <&soc_clocks MMP2_CLK_TWSI0>;
......@@ -368,7 +368,7 @@ twsi1: i2c@d4011000 {
twsi2: i2c@d4031000 {
compatible = "mrvl,mmp-twsi";
reg = <0xd4031000 0x1000>;
reg = <0xd4031000 0x70>;
interrupt-parent = <&twsi_mux>;
interrupts = <0>;
clocks = <&soc_clocks MMP2_CLK_TWSI1>;
......@@ -380,7 +380,7 @@ twsi2: i2c@d4031000 {
twsi3: i2c@d4032000 {
compatible = "mrvl,mmp-twsi";
reg = <0xd4032000 0x1000>;
reg = <0xd4032000 0x70>;
interrupt-parent = <&twsi_mux>;
interrupts = <1>;
clocks = <&soc_clocks MMP2_CLK_TWSI2>;
......@@ -392,7 +392,7 @@ twsi3: i2c@d4032000 {
twsi4: i2c@d4033000 {
compatible = "mrvl,mmp-twsi";
reg = <0xd4033000 0x1000>;
reg = <0xd4033000 0x70>;
interrupt-parent = <&twsi_mux>;
interrupts = <2>;
clocks = <&soc_clocks MMP2_CLK_TWSI3>;
......@@ -405,7 +405,7 @@ twsi4: i2c@d4033000 {
twsi5: i2c@d4033800 {
compatible = "mrvl,mmp-twsi";
reg = <0xd4033800 0x1000>;
reg = <0xd4033800 0x70>;
interrupt-parent = <&twsi_mux>;
interrupts = <3>;
clocks = <&soc_clocks MMP2_CLK_TWSI4>;
......@@ -417,7 +417,7 @@ twsi5: i2c@d4033800 {
twsi6: i2c@d4034000 {
compatible = "mrvl,mmp-twsi";
reg = <0xd4034000 0x1000>;
reg = <0xd4034000 0x70>;
interrupt-parent = <&twsi_mux>;
interrupts = <4>;
clocks = <&soc_clocks MMP2_CLK_TWSI5>;
......
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