Commit 83b03d62 authored by Xianwei Zhao's avatar Xianwei Zhao Committed by Neil Armstrong

dt-bindings: power: add Amlogic C3 power domains

Add devicetree binding document and related header file for Amlogic C3 secure power domains.
Signed-off-by: default avatarXianwei Zhao <xianwei.zhao@amlogic.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230707003710.2667989-3-xianwei.zhao@amlogic.comSigned-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
parent fadf1818
......@@ -12,7 +12,7 @@ maintainers:
- Jianxin Pan <jianxin.pan@amlogic.com>
description: |+
Secure Power Domains used in Meson A1/C1/S4 SoCs, and should be the child node
Secure Power Domains used in Meson A1/C1/S4 & C3 SoCs, and should be the child node
of secure-monitor.
properties:
......@@ -20,6 +20,7 @@ properties:
enum:
- amlogic,meson-a1-pwrc
- amlogic,meson-s4-pwrc
- amlogic,c3-pwrc
"#power-domain-cells":
const: 1
......
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
/*
* Copyright (c) 2023 Amlogic, Inc.
* Author: hongyu chen1 <hongyu.chen1@amlogic.com>
*/
#ifndef _DT_BINDINGS_AMLOGIC_C3_POWER_H
#define _DT_BINDINGS_AMLOGIC_C3_POWER_H
#define PWRC_C3_NNA_ID 0
#define PWRC_C3_AUDIO_ID 1
#define PWRC_C3_RESV_SEC_ID 2
#define PWRC_C3_SDIOA_ID 3
#define PWRC_C3_EMMC_ID 4
#define PWRC_C3_USB_COMB_ID 5
#define PWRC_C3_SDCARD_ID 6
#define PWRC_C3_ETH_ID 7
#define PWRC_C3_RESV0_ID 8
#define PWRC_C3_GE2D_ID 9
#define PWRC_C3_CVE_ID 10
#define PWRC_C3_GDC_WRAP_ID 11
#define PWRC_C3_ISP_TOP_ID 12
#define PWRC_C3_MIPI_ISP_WRAP_ID 13
#define PWRC_C3_VCODEC_ID 14
#endif
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment