Commit 8412c47d authored by Lukas Wunner's avatar Lukas Wunner Committed by Arnd Bergmann

ARM: dts: Fix TPM schema violations

Since commit 26c9d152 ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for ARM
devicetrees:

The nodename needs to be "tpm@0" rather than "tpmdev@0" and the
compatible property needs to contain the chip's name in addition to the
generic "tcg,tpm_tis-spi" or "tcg,tpm-tis-i2c":

  tpmdev@0: $nodename:0: 'tpmdev@0' does not match '^tpm(@[0-9a-f]+)?$'
        from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#

  tpm@2e: compatible: 'oneOf' conditional failed, one must be fixed:
        ['tcg,tpm-tis-i2c'] is too short
        from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm-tis-i2c.yaml#

Fix these schema violations.

Aspeed Facebook BMCs use an Infineon SLB9670:
https://lore.kernel.org/all/ZZSmMJ%2F%2Fl972Qbxu@fedora/
https://lore.kernel.org/all/ZZT4%2Fw2eVzMhtsPx@fedora/
https://lore.kernel.org/all/ZZTS0p1hdAchIbKp@heinlein.vulture-banana.ts.net/

Aspeed Tacoma uses a Nuvoton NPCT75X per commit 39d8a73c ("ARM: dts:
aspeed: tacoma: Add TPM").

phyGATE-Tauri uses an Infineon SLB9670:
https://lore.kernel.org/all/ab45c82485fa272f74adf560cbb58ee60cc42689.camel@phytec.de/

A single schema violation remains in am335x-moxa-uc-2100-common.dtsi
because it is unknown which chip is used on the board.  The devicetree's
author has been asked for clarification but has not responded so far:
https://lore.kernel.org/all/20231220090910.GA32182@wunner.de/Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
Reviewed-by: default avatarPatrick Williams <patrick@stwcx.xyz>
Reviewed-by: default avatarTao Ren <rentao.bupt@gmail.com>
Reviewed-by: default avatarBruno Thomsen <bruno.thomsen@gmail.com>
parent 6613476e
...@@ -45,8 +45,8 @@ spi1_gpio: spi1-gpio { ...@@ -45,8 +45,8 @@ spi1_gpio: spi1-gpio {
num-chipselects = <1>; num-chipselects = <1>;
cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
tpmdev@0 { tpm@0 {
compatible = "tcg,tpm_tis-spi"; compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
spi-max-frequency = <33000000>; spi-max-frequency = <33000000>;
reg = <0>; reg = <0>;
}; };
......
...@@ -80,8 +80,8 @@ spi_gpio: spi { ...@@ -80,8 +80,8 @@ spi_gpio: spi {
gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>;
num-chipselects = <1>; num-chipselects = <1>;
tpmdev@0 { tpm@0 {
compatible = "tcg,tpm_tis-spi"; compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
spi-max-frequency = <33000000>; spi-max-frequency = <33000000>;
reg = <0>; reg = <0>;
}; };
......
...@@ -456,7 +456,7 @@ &i2c1 { ...@@ -456,7 +456,7 @@ &i2c1 {
status = "okay"; status = "okay";
tpm: tpm@2e { tpm: tpm@2e {
compatible = "tcg,tpm-tis-i2c"; compatible = "nuvoton,npct75x", "tcg,tpm-tis-i2c";
reg = <0x2e>; reg = <0x2e>;
}; };
}; };
......
...@@ -35,8 +35,8 @@ spi_gpio: spi { ...@@ -35,8 +35,8 @@ spi_gpio: spi {
gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
tpmdev@0 { tpm@0 {
compatible = "tcg,tpm_tis-spi"; compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
spi-max-frequency = <33000000>; spi-max-frequency = <33000000>;
reg = <0>; reg = <0>;
}; };
......
...@@ -116,7 +116,7 @@ &ecspi1 { ...@@ -116,7 +116,7 @@ &ecspi1 {
tpm_tis: tpm@1 { tpm_tis: tpm@1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm>; pinctrl-0 = <&pinctrl_tpm>;
compatible = "tcg,tpm_tis-spi"; compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
reg = <1>; reg = <1>;
spi-max-frequency = <20000000>; spi-max-frequency = <20000000>;
interrupt-parent = <&gpio5>; interrupt-parent = <&gpio5>;
......
...@@ -130,7 +130,7 @@ &ecspi4 { ...@@ -130,7 +130,7 @@ &ecspi4 {
* TCG specification - Section 6.4.1 Clocking: * TCG specification - Section 6.4.1 Clocking:
* TPM shall support a SPI clock frequency range of 10-24 MHz. * TPM shall support a SPI clock frequency range of 10-24 MHz.
*/ */
st33htph: tpm-tis@0 { st33htph: tpm@0 {
compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
reg = <0>; reg = <0>;
spi-max-frequency = <24000000>; spi-max-frequency = <24000000>;
......
...@@ -217,7 +217,7 @@ &spi1 { ...@@ -217,7 +217,7 @@ &spi1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>; pinctrl-0 = <&spi1_pins>;
tpm_spi_tis@0 { tpm@0 {
compatible = "tcg,tpm_tis-spi"; compatible = "tcg,tpm_tis-spi";
reg = <0>; reg = <0>;
spi-max-frequency = <500000>; spi-max-frequency = <500000>;
......
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