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Commit 84407824 authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/disp: switch to subdev printk macros 

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e37f5433
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Showing with 102 additions and 88 deletions
drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.h
View file @ 84407824
......@@ -49,8 +49,8 @@ struct nvkm_connector_impl {
#ifndef MSG
#define MSG(l,f,a...) do { \
struct nvkm_connector *_conn = (void *)conn; \
nv_##l(_conn, "%02x:%02x%02x: "f, _conn->index, \
_conn->info.location, _conn->info.type, ##a); \
nvkm_##l(&nvkm_disp(_conn)->engine.subdev, "%02x:%02x%02x: "f, _conn->index, \
_conn->info.location, _conn->info.type, ##a); \
} while(0)
#define DBG(f,a...) MSG(debug, f, ##a)
#define ERR(f,a...) MSG(error, f, ##a)
......
drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c
View file @ 84407824
......@@ -69,7 +69,8 @@ nv50_dac_power(NV50_DISP_MTHD_V1)
int
nv50_dac_sense(NV50_DISP_MTHD_V1)
{
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
union {
struct nv50_disp_dac_load_v0 v0;
} *args = data;
......@@ -104,7 +105,7 @@ nv50_dac_sense(NV50_DISP_MTHD_V1)
break;
);
nv_debug(disp, "DAC%d sense: 0x%08x\n", outp->or, loadval);
nvkm_debug(subdev, "DAC%d sense: %08x\n", outp->or, loadval);
if (!(loadval & 0x80000000))
return -ETIMEDOUT;
......
drivers/gpu/drm/nouveau/nvkm/engine/disp/gf110.c
View file @ 84407824
......@@ -95,7 +95,8 @@ gf110_disp_dmac_init(struct nvkm_object *object)
{
struct nv50_disp *disp = (void *)object->engine;
struct nv50_disp_dmac *dmac = (void *)object;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
int chid = dmac->base.chid;
int ret;
......@@ -119,8 +120,8 @@ gf110_disp_dmac_init(struct nvkm_object *object)
if (!(nvkm_rd32(device, 0x610490 + (chid * 0x10)) & 0x80000000))
break;
) < 0) {
nv_error(dmac, "init: 0x%08x\n",
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
nvkm_error(subdev, "ch %d init: %08x\n", chid,
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
return -EBUSY;
}
......@@ -132,7 +133,8 @@ gf110_disp_dmac_fini(struct nvkm_object *object, bool suspend)
{
struct nv50_disp *disp = (void *)object->engine;
struct nv50_disp_dmac *dmac = (void *)object;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
int chid = dmac->base.chid;
/* deactivate channel */
......@@ -142,8 +144,8 @@ gf110_disp_dmac_fini(struct nvkm_object *object, bool suspend)
if (!(nvkm_rd32(device, 0x610490 + (chid * 0x10)) & 0x001e0000))
break;
) < 0) {
nv_error(dmac, "fini: 0x%08x\n",
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
nvkm_error(subdev, "ch %d fini: %08x\n", chid,
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
if (suspend)
return -EBUSY;
}
......@@ -304,7 +306,8 @@ gf110_disp_core_init(struct nvkm_object *object)
{
struct nv50_disp *disp = (void *)object->engine;
struct nv50_disp_dmac *mast = (void *)object;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
int ret;
ret = nv50_disp_chan_init(&mast->base);
......@@ -327,7 +330,8 @@ gf110_disp_core_init(struct nvkm_object *object)
if (!(nvkm_rd32(device, 0x610490) & 0x80000000))
break;
) < 0) {
nv_error(mast, "init: 0x%08x\n", nvkm_rd32(device, 0x610490));
nvkm_error(subdev, "core init: %08x\n",
nvkm_rd32(device, 0x610490));
return -EBUSY;
}
......@@ -339,7 +343,8 @@ gf110_disp_core_fini(struct nvkm_object *object, bool suspend)
{
struct nv50_disp *disp = (void *)object->engine;
struct nv50_disp_dmac *mast = (void *)object;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
/* deactivate channel */
nvkm_mask(device, 0x610490, 0x00000010, 0x00000000);
......@@ -348,7 +353,8 @@ gf110_disp_core_fini(struct nvkm_object *object, bool suspend)
if (!(nvkm_rd32(device, 0x610490) & 0x001e0000))
break;
) < 0) {
nv_error(mast, "fini: 0x%08x\n", nvkm_rd32(device, 0x610490));
nvkm_error(subdev, "core fini: %08x\n",
nvkm_rd32(device, 0x610490));
if (suspend)
return -EBUSY;
}
......@@ -559,7 +565,8 @@ gf110_disp_pioc_init(struct nvkm_object *object)
{
struct nv50_disp *disp = (void *)object->engine;
struct nv50_disp_pioc *pioc = (void *)object;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
int chid = pioc->base.chid;
int ret;
......@@ -577,8 +584,8 @@ gf110_disp_pioc_init(struct nvkm_object *object)
if ((tmp & 0x00030000) == 0x00010000)
break;
) < 0) {
nv_error(pioc, "init: 0x%08x\n",
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
nvkm_error(subdev, "ch %d init: %08x\n", chid,
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
return -EBUSY;
}
......@@ -590,7 +597,8 @@ gf110_disp_pioc_fini(struct nvkm_object *object, bool suspend)
{
struct nv50_disp *disp = (void *)object->engine;
struct nv50_disp_pioc *pioc = (void *)object;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
int chid = pioc->base.chid;
nvkm_mask(device, 0x610490 + (chid * 0x10), 0x00000001, 0x00000000);
......@@ -598,8 +606,8 @@ gf110_disp_pioc_fini(struct nvkm_object *object, bool suspend)
if (!(nvkm_rd32(device, 0x610490 + (chid * 0x10)) & 0x00030000))
break;
) < 0) {
nv_error(pioc, "timeout: 0x%08x\n",
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
nvkm_error(subdev, "ch %d fini: %08x\n", chid,
nvkm_rd32(device, 0x610490 + (chid * 0x10)));
if (suspend)
return -EBUSY;
}
......@@ -824,7 +832,8 @@ exec_lookup(struct nv50_disp *disp, int head, int or, u32 ctrl,
u32 *data, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_outp *info)
{
struct nvkm_bios *bios = nvkm_bios(disp);
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_bios *bios = subdev->device->bios;
struct nvkm_output *outp;
u16 mask, type;
......@@ -841,7 +850,7 @@ exec_lookup(struct nv50_disp *disp, int head, int or, u32 ctrl,
case 0x00000800: type = DCB_OUTPUT_DP; mask = 1; break;
case 0x00000900: type = DCB_OUTPUT_DP; mask = 2; break;
default:
nv_error(disp, "unknown SOR mc 0x%08x\n", ctrl);
nvkm_error(subdev, "unknown SOR mc %08x\n", ctrl);
return NULL;
}
}
......@@ -1136,14 +1145,15 @@ gf110_disp_intr_supervisor(struct work_struct *work)
struct nv50_disp *disp =
container_of(work, struct nv50_disp, supervisor);
struct nv50_disp_impl *impl = (void *)nv_object(disp)->oclass;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
u32 mask[4];
int head;
nv_debug(disp, "supervisor %d\n", ffs(disp->super));
nvkm_debug(subdev, "supervisor %d\n", ffs(disp->super));
for (head = 0; head < disp->head.nr; head++) {
mask[head] = nvkm_rd32(device, 0x6101d4 + (head * 0x800));
nv_debug(disp, "head %d: 0x%08x\n", head, mask[head]);
nvkm_debug(subdev, "head %d: %08x\n", head, mask[head]);
}
if (disp->super & 0x00000001) {
......@@ -1151,7 +1161,7 @@ gf110_disp_intr_supervisor(struct work_struct *work)
for (head = 0; head < disp->head.nr; head++) {
if (!(mask[head] & 0x00001000))
continue;
nv_debug(disp, "supervisor 1.0 - head %d\n", head);
nvkm_debug(subdev, "supervisor 1.0 - head %d\n", head);
gf110_disp_intr_unk1_0(disp, head);
}
} else
......@@ -1159,19 +1169,19 @@ gf110_disp_intr_supervisor(struct work_struct *work)
for (head = 0; head < disp->head.nr; head++) {
if (!(mask[head] & 0x00001000))
continue;
nv_debug(disp, "supervisor 2.0 - head %d\n", head);
nvkm_debug(subdev, "supervisor 2.0 - head %d\n", head);
gf110_disp_intr_unk2_0(disp, head);
}
for (head = 0; head < disp->head.nr; head++) {
if (!(mask[head] & 0x00010000))
continue;
nv_debug(disp, "supervisor 2.1 - head %d\n", head);
nvkm_debug(subdev, "supervisor 2.1 - head %d\n", head);
gf110_disp_intr_unk2_1(disp, head);
}
for (head = 0; head < disp->head.nr; head++) {
if (!(mask[head] & 0x00001000))
continue;
nv_debug(disp, "supervisor 2.2 - head %d\n", head);
nvkm_debug(subdev, "supervisor 2.2 - head %d\n", head);
gf110_disp_intr_unk2_2(disp, head);
}
} else
......@@ -1179,7 +1189,7 @@ gf110_disp_intr_supervisor(struct work_struct *work)
for (head = 0; head < disp->head.nr; head++) {
if (!(mask[head] & 0x00001000))
continue;
nv_debug(disp, "supervisor 3.0 - head %d\n", head);
nvkm_debug(subdev, "supervisor 3.0 - head %d\n", head);
gf110_disp_intr_unk4_0(disp, head);
}
}
......@@ -1193,14 +1203,14 @@ static void
gf110_disp_intr_error(struct nv50_disp *disp, int chid)
{
const struct nv50_disp_impl *impl = (void *)nv_object(disp)->oclass;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_subdev *subdev = &disp->base.engine.subdev;
struct nvkm_device *device = subdev->device;
u32 mthd = nvkm_rd32(device, 0x6101f0 + (chid * 12));
u32 data = nvkm_rd32(device, 0x6101f4 + (chid * 12));
u32 unkn = nvkm_rd32(device, 0x6101f8 + (chid * 12));
nv_error(disp, "chid %d mthd 0x%04x data 0x%08x "
"0x%08x 0x%08x\n",
chid, (mthd & 0x0000ffc), data, mthd, unkn);
nvkm_error(subdev, "chid %d mthd %04x data %08x %08x %08x\n",
chid, (mthd & 0x0000ffc), data, mthd, unkn);
if (chid == 0) {
switch (mthd & 0xffc) {
......@@ -1241,7 +1251,7 @@ void
gf110_disp_intr(struct nvkm_subdev *subdev)
{
struct nv50_disp *disp = (void *)subdev;
struct nvkm_device *device = disp->base.engine.subdev.device;
struct nvkm_device *device = subdev->device;
u32 intr = nvkm_rd32(device, 0x610088);
int i;
......@@ -1273,7 +1283,7 @@ gf110_disp_intr(struct nvkm_subdev *subdev)
}
if (stat) {
nv_info(disp, "unknown intr24 0x%08x\n", stat);
nvkm_warn(subdev, "intr24 %08x\n", stat);
nvkm_wr32(device, 0x6100ac, stat);
}
......
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c
View file @ 84407824
......@@ -167,7 +167,7 @@ nv04_disp_intr(struct nvkm_subdev *subdev)
nv_device(disp)->chipset <= 0x40) {
pvideo = nvkm_rd32(device, 0x8100);
if (pvideo & ~0x11)
nv_info(disp, "PVIDEO intr: %08x\n", pvideo);
nvkm_info(subdev, "PVIDEO intr: %08x\n", pvideo);
nvkm_wr32(device, 0x8100, pvideo);
}
}
......
drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.h
View file @ 84407824
......@@ -52,7 +52,7 @@ struct nvkm_output_impl {
#ifndef MSG
#define MSG(l,f,a...) do { \
struct nvkm_output *_outp = (void *)outp; \
nv_##l(_outp, "%02x:%04x:%04x: "f, _outp->index, \
nvkm_##l(&nvkm_disp(_outp)->engine.subdev, "%02x:%04x:%04x: "f, _outp->index, \
_outp->info.hasht, _outp->info.hashm, ##a); \
} while(0)
#define DBG(f,a...) MSG(debug, f, ##a)
......
drivers/gpu/drm/nouveau/nvkm/engine/disp/vga.c
View file @ 84407824
......@@ -44,7 +44,6 @@ nv_rdport(void *obj, int head, u16 port)
return nvkm_rd08(device, 0x0c0000 + (head * 0x2000) + port);
}
nv_error(obj, "unknown vga port 0x%04x\n", port);
return 0x00;
}
......@@ -67,8 +66,7 @@ nv_wrport(void *obj, int head, u16 port, u8 data)
if (device->card_type < NV_40)
head = 0; /* CR44 selects head */
nvkm_wr08(device, 0x0c0000 + (head * 0x2000) + port, data);
} else
nv_error(obj, "unknown vga port 0x%04x\n", port);
}
}
u8
......@@ -119,7 +117,6 @@ nv_rdvgai(void *obj, int head, u16 port, u8 index)
if (port == 0x03c4) return nv_rdvgas(obj, head, index);
if (port == 0x03ce) return nv_rdvgag(obj, head, index);
if (port == 0x03d4) return nv_rdvgac(obj, head, index);
nv_error(obj, "unknown indexed vga port 0x%04x\n", port);
return 0x00;
}
......@@ -129,7 +126,6 @@ nv_wrvgai(void *obj, int head, u16 port, u8 index, u8 value)
if (port == 0x03c4) nv_wrvgas(obj, head, index, value);
else if (port == 0x03ce) nv_wrvgag(obj, head, index, value);
else if (port == 0x03d4) nv_wrvgac(obj, head, index, value);
else nv_error(obj, "unknown indexed vga port 0x%04x\n", port);
}
bool
......@@ -192,7 +188,6 @@ nv_rdvgaowner(void *obj)
return nv_rdvgac(obj, 0, 0x44);
}
nv_error(obj, "rdvgaowner after nv4x\n");
return 0x00;
}
......@@ -213,6 +208,5 @@ nv_wrvgaowner(void *obj, u8 select)
nv_wrvgac(obj, 0, 0x2e, owner);
nv_wrvgac(obj, 0, 0x2e, owner);
}
} else
nv_error(obj, "wrvgaowner after nv4x\n");
}
}
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