arm64: Documentation: cpu-feature-registers: Remove RES0 fields

Remove the invisible RES0 field entries from the table, listing fields in CPU ID feature registers, as : 1) We are only interested in the user visible fields. 2) The field description may not be up-to-date, as the field could be assigned a new meaning. 3) We already explain the rules of the fields which are not visible. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Dave Martin <dave.martin@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>

arm64: Documentation: cpu-feature-registers: Remove RES0 fields
Remove the invisible RES0 field entries from the table, listing fields in CPU ID feature registers, as : 1) We are only interested in the user visible fields. 2) The field description may not be up-to-date, as the field could be assigned a new meaning. 3) We already explain the rules of the fields which are not visible. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Dave Martin <dave.martin@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
847ecd3f · Suzuki K Poulose · Will Deacon · 350e1dad · 847ecd3f
Commit 847ecd3f authored Mar 12, 2018 by Suzuki K Poulose Committed by Will Deacon Mar 19, 2018
Hide whitespace changes
Inline Side-by-side

Showing with 0 additions and 8 deletions

Documentation/arm64/cpu-feature-registers.txt Documentation/arm64/cpu-feature-registers.txt +0 -8

No files found.
--- a/Documentation/arm64/cpu-feature-registers.txt
+++ b/Documentation/arm64/cpu-feature-registers.txt
@@ -110,7 +110,6 @@ infrastructure:
     x--------------------------------------------------x
     | Name                         |  bits   | visible |
     |--------------------------------------------------|
-     | RES0                         | [63-52] |    n    |
     |--------------------------------------------------|
     | FHM                          | [51-48] |    y    |
     |--------------------------------------------------|
@@ -124,8 +123,6 @@ infrastructure:
     |--------------------------------------------------|
     | RDM                          | [31-28] |    y    |
     |--------------------------------------------------|
-     | RES0                         | [27-24] |    n    |
-     |--------------------------------------------------|
     | ATOMICS                      | [23-20] |    y    |
     |--------------------------------------------------|
     | CRC32                        | [19-16] |    y    |
@@ -135,8 +132,6 @@ infrastructure:
     | SHA1                         | [11-8]  |    y    |
     |--------------------------------------------------|
     | AES                          | [7-4]   |    y    |
-     |--------------------------------------------------|
-     | RES0                         | [3-0]   |    n    |
     x--------------------------------------------------x


@@ -144,12 +139,9 @@ infrastructure:
     x--------------------------------------------------x
     | Name                         |  bits   | visible |
     |--------------------------------------------------|
-     | RES0                         | [63-36] |    n    |
     |--------------------------------------------------|
     | SVE                          | [35-32] |    y    |
     |--------------------------------------------------|
-     | RES0                         | [31-28] |    n    |
-     |--------------------------------------------------|
     | GIC                          | [27-24] |    n    |
     |--------------------------------------------------|
     | AdvSIMD                      | [23-20] |    y    |