Commit 85593b75 authored by Thierry Reding's avatar Thierry Reding

arm64: tegra: Add FUSE block on Tegra186

The FUSE register block found on Tegra186 SoCs encodes various settings,
such as calibration data for other blocks.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 94e25dc3
......@@ -265,6 +265,13 @@ sdmmc4: sdhci@3460000 {
status = "disabled";
};
fuse@3820000 {
compatible = "nvidia,tegra186-efuse";
reg = <0x0 0x03820000 0x0 0x10000>;
clocks = <&bpmp TEGRA186_CLK_FUSE>;
clock-names = "fuse";
};
gic: interrupt-controller@3881000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment