Commit 85609153 authored by Asad Kamal's avatar Asad Kamal Committed by Alex Deucher

drm/amd/pm: Update SMUv13.0.6 PMFW headers

Update PMFW interface headers for updated metrics table and
critical temperature message
Signed-off-by: default avatarAsad Kamal <asad.kamal@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 46b55e25
...@@ -123,7 +123,7 @@ typedef enum { ...@@ -123,7 +123,7 @@ typedef enum {
VOLTAGE_GUARDBAND_COUNT VOLTAGE_GUARDBAND_COUNT
} GFX_GUARDBAND_e; } GFX_GUARDBAND_e;
#define SMU_METRICS_TABLE_VERSION 0x5 #define SMU_METRICS_TABLE_VERSION 0x7
typedef struct __attribute__((packed, aligned(4))) { typedef struct __attribute__((packed, aligned(4))) {
uint32_t AccumulationCounter; uint32_t AccumulationCounter;
...@@ -198,7 +198,7 @@ typedef struct __attribute__((packed, aligned(4))) { ...@@ -198,7 +198,7 @@ typedef struct __attribute__((packed, aligned(4))) {
uint32_t SocketThmResidencyAcc; uint32_t SocketThmResidencyAcc;
uint32_t VrThmResidencyAcc; uint32_t VrThmResidencyAcc;
uint32_t HbmThmResidencyAcc; uint32_t HbmThmResidencyAcc;
uint32_t spare; uint32_t GfxLockXCDMak;
// New Items at end to maintain driver compatibility // New Items at end to maintain driver compatibility
uint32_t GfxclkFrequency[8]; uint32_t GfxclkFrequency[8];
......
...@@ -83,13 +83,27 @@ ...@@ -83,13 +83,27 @@
#define PPSMC_MSG_GetMinGfxDpmFreq 0x32 #define PPSMC_MSG_GetMinGfxDpmFreq 0x32
#define PPSMC_MSG_GetMaxGfxDpmFreq 0x33 #define PPSMC_MSG_GetMaxGfxDpmFreq 0x33
#define PPSMC_MSG_PrepareForDriverUnload 0x34 #define PPSMC_MSG_PrepareForDriverUnload 0x34
#define PPSMC_Message_Count 0x35 #define PPSMC_MSG_ReadThrottlerLimit 0x35
#define PPSMC_MSG_QueryValidMcaCount 0x36
#define PPSMC_MSG_McaBankDumpDW 0x37
#define PPSMC_MSG_GetCTFLimit 0x38
#define PPSMC_Message_Count 0x39
//PPSMC Reset Types for driver msg argument //PPSMC Reset Types for driver msg argument
#define PPSMC_RESET_TYPE_DRIVER_MODE_1_RESET 0x1 #define PPSMC_RESET_TYPE_DRIVER_MODE_1_RESET 0x1
#define PPSMC_RESET_TYPE_DRIVER_MODE_2_RESET 0x2 #define PPSMC_RESET_TYPE_DRIVER_MODE_2_RESET 0x2
#define PPSMC_RESET_TYPE_DRIVER_MODE_3_RESET 0x3 #define PPSMC_RESET_TYPE_DRIVER_MODE_3_RESET 0x3
//PPSMC Reset Types for driver msg argument
#define PPSMC_THROTTLING_LIMIT_TYPE_SOCKET 0x1
#define PPSMC_THROTTLING_LIMIT_TYPE_HBM 0x2
//CTF/Throttle Limit types
#define PPSMC_AID_THM_TYPE 0x1
#define PPSMC_CCD_THM_TYPE 0x2
#define PPSMC_XCD_THM_TYPE 0x3
#define PPSMC_HBM_THM_TYPE 0x4
typedef uint32_t PPSMC_Result; typedef uint32_t PPSMC_Result;
typedef uint32_t PPSMC_MSG; typedef uint32_t PPSMC_MSG;
......
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