Commit 858d8e14 authored by Enric Balletbo i Serra's avatar Enric Balletbo i Serra Committed by Matthias Brugger

dt-bindings: display: mediatek: add dsi reset optional property

Update device tree binding documentation for the dsi to add the optional
property to reset the dsi controller.
Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.3.Ifec72a83f224b62f24cfc967edfe78c5d276b2e3@changeidSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 6046ffc3
...@@ -19,6 +19,11 @@ Required properties: ...@@ -19,6 +19,11 @@ Required properties:
Documentation/devicetree/bindings/graph.txt. This port should be connected Documentation/devicetree/bindings/graph.txt. This port should be connected
to the input port of an attached DSI panel or DSI-to-eDP encoder chip. to the input port of an attached DSI panel or DSI-to-eDP encoder chip.
Optional properties:
- resets: list of phandle + reset specifier pair, as described in [1].
[1] Documentation/devicetree/bindings/reset/reset.txt
MIPI TX Configuration Module MIPI TX Configuration Module
============================ ============================
...@@ -45,6 +50,7 @@ dsi0: dsi@1401b000 { ...@@ -45,6 +50,7 @@ dsi0: dsi@1401b000 {
clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>, clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>,
<&mipi_tx0>; <&mipi_tx0>;
clock-names = "engine", "digital", "hs"; clock-names = "engine", "digital", "hs";
resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
phys = <&mipi_tx0>; phys = <&mipi_tx0>;
phy-names = "dphy"; phy-names = "dphy";
......
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