Commit 85a774d9 authored by Zhigang Luo's avatar Zhigang Luo Committed by Alex Deucher

drm/amdgpu: extended waiting SRIOV VF reset completion timeout to 10s

For the ASIC has big FB, it need more time to clear FB during reset.
This change extended SRIOV VF waiting reset completion timeout from 5s
to 10s.
Signed-off-by: default avatarZhigang Luo <zhigang.luo@amd.com>
Acked-by: default avatarShaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a5f67c93
......@@ -26,7 +26,7 @@
#define AI_MAILBOX_POLL_ACK_TIMEDOUT 500
#define AI_MAILBOX_POLL_MSG_TIMEDOUT 6000
#define AI_MAILBOX_POLL_FLR_TIMEDOUT 5000
#define AI_MAILBOX_POLL_FLR_TIMEDOUT 10000
#define AI_MAILBOX_POLL_MSG_REP_MAX 11
enum idh_request {
......
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