Commit 8675e8d3 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Mark Brown

soc: qcom dt-bindings: Add APR bus bindings

This patch add dt bindings for Qualcomm APR (Asynchronous Packet Router)
bus driver. This bus is used for communicating with DSP which provides
audio and various other services to cpu.
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: default avatarBanajit Goswami <bgoswami@codeaurora.org>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 9af8937e
Qualcomm APR (Asynchronous Packet Router) binding
This binding describes the Qualcomm APR. APR is a IPC protocol for
communication between Application processor and QDSP. APR is mainly
used for audio/voice services on the QDSP.
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,apr-v<VERSION-NUMBER>", example "qcom,apr-v2"
- reg
Usage: required
Value type: <u32>
Definition: Destination processor ID.
Possible values are :
1 - APR simulator
2 - PC
3 - MODEM
4 - ADSP
5 - APPS
6 - MODEM2
7 - APPS2
= APR SERVICES
Each subnode of the APR node represents service tied to this apr. The name
of the nodes are not important. The properties of these nodes are defined
by the individual bindings for the specific service
- All APR services MUST contain the following property:
- reg
Usage: required
Value type: <u32>
Definition: APR Service ID
Possible values are :
3 - DSP Core Service
4 - Audio Front End Service.
5 - Voice Stream Manager Service.
6 - Voice processing manager.
7 - Audio Stream Manager Service.
8 - Audio Device Manager Service.
9 - Multimode voice manager.
10 - Core voice stream.
11 - Core voice processor.
12 - Ultrasound stream manager.
13 - Listen stream manager.
= EXAMPLE
The following example represents a QDSP based sound card on a MSM8996 device
which uses apr as communication between Apps and QDSP.
apr@4 {
compatible = "qcom,apr-v2";
reg = <APR_DOMAIN_ADSP>;
q6core@3 {
compatible = "qcom,q6core";
reg = <APR_SVC_ADSP_CORE>;
};
q6afe@4 {
compatible = "qcom,q6afe";
reg = <APR_SVC_AFE>;
dais {
#sound-dai-cells = <1>;
hdmi@1 {
reg = <1>;
};
};
};
q6asm@7 {
compatible = "qcom,q6asm";
reg = <APR_SVC_ASM>;
...
};
q6adm@8 {
compatible = "qcom,q6adm";
reg = <APR_SVC_ADM>;
...
};
};
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_BINDINGS_QCOM_APR_H
#define __DT_BINDINGS_QCOM_APR_H
/* Domain IDs */
#define APR_DOMAIN_SIM 0x1
#define APR_DOMAIN_PC 0x2
#define APR_DOMAIN_MODEM 0x3
#define APR_DOMAIN_ADSP 0x4
#define APR_DOMAIN_APPS 0x5
#define APR_DOMAIN_MAX 0x6
/* ADSP service IDs */
#define APR_SVC_ADSP_CORE 0x3
#define APR_SVC_AFE 0x4
#define APR_SVC_VSM 0x5
#define APR_SVC_VPM 0x6
#define APR_SVC_ASM 0x7
#define APR_SVC_ADM 0x8
#define APR_SVC_ADSP_MVM 0x09
#define APR_SVC_ADSP_CVS 0x0A
#define APR_SVC_ADSP_CVP 0x0B
#define APR_SVC_USM 0x0C
#define APR_SVC_LSM 0x0D
#define APR_SVC_VIDC 0x16
#define APR_SVC_MAX 0x17
#endif /* __DT_BINDINGS_QCOM_APR_H */
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