PPC32: interrupt fixes along the lines of Ingo's changes to x86.

We don't unmask the interrupt at the end of handling it if there
is no action (i.e. someone has done free_irq).  Add some likely
and unlikely hints and fix synchronize_irq.

arch/ppc/kernel/i8259.c

@@ -130,7 +130,8 @@ static void i8259_unmask_irq(unsigned int irq_nr)
 
 static void i8259_end_irq(unsigned int irq)
 {
-	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))
+	    && irq_desc[irq].action)
 		i8259_unmask_irq(irq);
 }
 

arch/ppc/kernel/irq.c

@@ -443,7 +443,7 @@ void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq)
 	 * use the action we have.
 	 */
 	action = NULL;
-	if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+	if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
 		action = desc->action;
 		if (!action || !action->handler) {
 			ppc_spurious_interrupts++;
@@ -468,7 +468,7 @@ void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq)
 	   a different instance of this same irq, the other processor
 	   will take care of it.
 	 */
-	if (!action)
+	if (unlikely(!action))
 		goto out;
 
 
@@ -487,12 +487,12 @@ void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq)
 		handle_irq_event(irq, regs, action);
 		spin_lock(&desc->lock);
 		
-		if (!(desc->status & IRQ_PENDING))
+		if (likely(!(desc->status & IRQ_PENDING)))
 			break;
 		desc->status &= ~IRQ_PENDING;
 	}
-	desc->status &= ~IRQ_INPROGRESS;
 out:
+	desc->status &= ~IRQ_INPROGRESS;
 	/*
 	 * The ->end() handler has to deal with interrupts which got
 	 * disabled while the handler was running.
@@ -561,10 +561,6 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SMP
 void synchronize_irq(unsigned int irq)
 {
-        /* is there anything to synchronize with? */
-	if (!irq_desc[irq].action)
-		return;
-
 	while (irq_desc[irq].status & IRQ_INPROGRESS)
 		barrier();
 }

arch/ppc/kernel/open_pic.c

@@ -25,6 +25,7 @@
 #include <asm/sections.h>
 #include <asm/open_pic.h>
 #include <asm/i8259.h>
+#include <asm/hardirq.h>
 
 #include "open_pic_defs.h"
 
@@ -798,7 +799,8 @@ static void openpic_ack_irq(unsigned int irq_nr)
 
 static void openpic_end_irq(unsigned int irq_nr)
 {
-	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
+	    && irq_desc[irq_nr].action)
 		openpic_enable_irq(irq_nr);
 }
 

arch/ppc/kernel/ppc4xx_pic.c

@@ -236,7 +236,8 @@ ppc405_uic_end(unsigned int irq)
 		}
 	}
 
-	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))
+	    && irq_desc[irq].action) {
 		ppc_cached_irq_mask[word] |= 1 << (31 - bit);
 		switch (word){
 			case 0:

arch/ppc/kernel/ppc8260_pic.c

@@ -90,7 +90,8 @@ static void m8260_end_irq(unsigned int irq_nr)
 	int	bit, word;
 	volatile uint	*simr;
 
-	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
+	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
+			&& irq_desc[irq_nr].action) {
 
 		bit = irq_to_siubit[irq_nr];
 		word = irq_to_siureg[irq_nr];

arch/ppc/kernel/ppc8xx_pic.c

@@ -46,7 +46,8 @@ static void m8xx_unmask_irq(unsigned int irq_nr)
 
 static void m8xx_end_irq(unsigned int irq_nr)
 {
-	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
+	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
+			&& irq_desc[irq_nr].action) {
 		int bit, word;
 
 		bit = irq_nr & 0x1f;

arch/ppc/platforms/pmac_pic.c

@@ -149,7 +149,8 @@ static void __pmac pmac_unmask_irq(unsigned int irq_nr)
 
 static void __pmac pmac_end_irq(unsigned int irq_nr)
 {
-	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
+	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
+	    && irq_desc[irq_nr].action) {
         	set_bit(irq_nr, ppc_cached_irq_mask);
 	        pmac_set_irq_mask(irq_nr, 1);
 	}