ALSA: hda - Enable sync_write for AMD chipset with IDT 92HD8x codecs

The AMD chipset seems unstable in the normal operation mode, and it
seems requring more sensible access for each verb.  Enabling sync_write
mode and allowing bus-reset is a sort of workaround for these chipset
stability issues.
Signed-off-by: Takashi Iwai <tiwai@suse.de>

sound/pci/hda/patch_sigmatel.c

@@ -5446,6 +5446,13 @@ static int patch_stac92hd83xxx(struct hda_codec *codec)
 	spec->multiout.dac_nids = spec->dac_nids;
 	spec->init = stac92hd83xxx_core_init;
 
+	if (codec->bus->pci && codec->bus->pci->vendor == PCI_VENDOR_ID_AMD) {
+		snd_printk(KERN_INFO "idt92hd83xxx: "
+			   "Enable sync_write for AMD chipset\n");
+		codec->bus->sync_write = 1;
+		codec->bus->allow_bus_reset = 1;
+	}
+
 	spec->board_config = snd_hda_check_board_config(codec,
 							STAC_92HD83XXX_MODELS,
 							stac92hd83xxx_models,