Commit 88987ef9 authored by Catalin Marinas's avatar Catalin Marinas

Thumb-2: Add some .align statements to the .S files

Since the Thumb-2 instructions can be 16-bit wide, data in the .text
sections may not be aligned to a 32-bit word and this leads to unaligned
exceptions. This patch does not affect the ARM code generation.
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 4be3bd78
...@@ -291,6 +291,7 @@ wont_overwrite: mov r0, r4 ...@@ -291,6 +291,7 @@ wont_overwrite: mov r0, r4
bl decompress_kernel bl decompress_kernel
b call_kernel b call_kernel
.align 2
.type LC0, #object .type LC0, #object
LC0: .word LC0 @ r1 LC0: .word LC0 @ r1
.word __bss_start @ r2 .word __bss_start @ r2
...@@ -589,6 +590,7 @@ call_cache_fn: adr r12, proc_types ...@@ -589,6 +590,7 @@ call_cache_fn: adr r12, proc_types
* methods. Writeback caches _must_ have the flush method * methods. Writeback caches _must_ have the flush method
* defined. * defined.
*/ */
.align 2
.type proc_types,#object .type proc_types,#object
proc_types: proc_types:
.word 0x41560600 @ ARM6/610 .word 0x41560600 @ ARM6/610
...@@ -945,6 +947,7 @@ __armv3_mpu_cache_flush: ...@@ -945,6 +947,7 @@ __armv3_mpu_cache_flush:
* memory, which again must be relocatable. * memory, which again must be relocatable.
*/ */
#ifdef DEBUG #ifdef DEBUG
.align 2
.type phexbuf,#object .type phexbuf,#object
phexbuf: .space 12 phexbuf: .space 12
.size phexbuf, . - phexbuf .size phexbuf, . - phexbuf
......
...@@ -1065,6 +1065,10 @@ vector_\name: ...@@ -1065,6 +1065,10 @@ vector_\name:
ldr lr, [pc, lr, lsl #2] ldr lr, [pc, lr, lsl #2]
movs pc, lr @ branch to handler in SVC mode movs pc, lr @ branch to handler in SVC mode
ENDPROC(vector_\name) ENDPROC(vector_\name)
.align 2
@ handler addresses follow this label
1:
.endm .endm
.globl __stubs_start .globl __stubs_start
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#define ATAG_CORE 0x54410001 #define ATAG_CORE 0x54410001
#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
.align 2
.type __switch_data, %object .type __switch_data, %object
__switch_data: __switch_data:
.long __mmap_switched .long __mmap_switched
...@@ -185,6 +186,7 @@ ENDPROC(lookup_processor_type) ...@@ -185,6 +186,7 @@ ENDPROC(lookup_processor_type)
* Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for * Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for
* more information about the __proc_info and __arch_info structures. * more information about the __proc_info and __arch_info structures.
*/ */
.align 2
.long __proc_info_begin .long __proc_info_begin
.long __proc_info_end .long __proc_info_end
3: .long . 3: .long .
......
...@@ -187,6 +187,7 @@ ENTRY(sha_transform) ...@@ -187,6 +187,7 @@ ENTRY(sha_transform)
ENDPROC(sha_transform) ENDPROC(sha_transform)
.align 2
.L_sha_K: .L_sha_K:
.word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6 .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
...@@ -195,6 +196,7 @@ ENDPROC(sha_transform) ...@@ -195,6 +196,7 @@ ENDPROC(sha_transform)
* void sha_init(__u32 *buf) * void sha_init(__u32 *buf)
*/ */
.align 2
.L_sha_initial_digest: .L_sha_initial_digest:
.word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0 .word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0
......
...@@ -42,6 +42,7 @@ ENTRY(vfp_null_entry) ...@@ -42,6 +42,7 @@ ENTRY(vfp_null_entry)
mov pc, lr mov pc, lr
ENDPROC(vfp_null_entry) ENDPROC(vfp_null_entry)
.align 2
.LCvfp: .LCvfp:
.word vfp_vector .word vfp_vector
...@@ -61,6 +62,7 @@ ENTRY(vfp_testing_entry) ...@@ -61,6 +62,7 @@ ENTRY(vfp_testing_entry)
mov pc, r9 @ we have handled the fault mov pc, r9 @ we have handled the fault
ENDPROC(vfp_testing_entry) ENDPROC(vfp_testing_entry)
.align 2
VFP_arch_address: VFP_arch_address:
.word VFP_arch .word VFP_arch
......
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