Commit 893eae9a authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Palmer Dabbelt

riscv: dts: sifive: fu540-c000: Fix PLIC node

Fix the device node for the Platform-Level Interrupt Controller (PLIC):
  - Add missing "#address-cells" property,
  - Sort properties according to DT bindings.
Signed-off-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 8fc6e62a
...@@ -140,10 +140,10 @@ soc { ...@@ -140,10 +140,10 @@ soc {
compatible = "simple-bus"; compatible = "simple-bus";
ranges; ranges;
plic0: interrupt-controller@c000000 { plic0: interrupt-controller@c000000 {
#interrupt-cells = <1>;
compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
reg = <0x0 0xc000000 0x0 0x4000000>; reg = <0x0 0xc000000 0x0 0x4000000>;
riscv,ndev = <53>; #address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller; interrupt-controller;
interrupts-extended = interrupts-extended =
<&cpu0_intc 0xffffffff>, <&cpu0_intc 0xffffffff>,
...@@ -151,6 +151,7 @@ plic0: interrupt-controller@c000000 { ...@@ -151,6 +151,7 @@ plic0: interrupt-controller@c000000 {
<&cpu2_intc 0xffffffff>, <&cpu2_intc 9>, <&cpu2_intc 0xffffffff>, <&cpu2_intc 9>,
<&cpu3_intc 0xffffffff>, <&cpu3_intc 9>, <&cpu3_intc 0xffffffff>, <&cpu3_intc 9>,
<&cpu4_intc 0xffffffff>, <&cpu4_intc 9>; <&cpu4_intc 0xffffffff>, <&cpu4_intc 9>;
riscv,ndev = <53>;
}; };
prci: clock-controller@10000000 { prci: clock-controller@10000000 {
compatible = "sifive,fu540-c000-prci"; compatible = "sifive,fu540-c000-prci";
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment