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Commit 895c8b7b authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC fixes from Arnd Bergmann:
 "The arm-soc bug fixes this time around are mostly for the omap
  platform, coming from a pull request from Tony Lindgren and are almost
  entirely fixing dts files.

  The other two changes enable support for the shmobile platform in
  generic armv7 kernels and change some properties in the ARM64
  reference board dts files"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: multi_v7_defconfig: Enable shmobile platforms
  arm64: Add L2 cache topology to ARM Ltd boards/models
  ARM: dts: am335x-bone*: usb0 is hardwired for peripheral
  ARM: dts: dra7x-evm: beagle-x15: Fix USB Host
  ARM: omap2plus_defconfig: Fix SATA boot
  ARM: omap2plus_defconfig: Enable OMAP NAND BCH driver
  ARM: dts: dra7: Correct the dma controller's property names
  ARM: dts: omap5: Correct the dma controller's property names
  ARM: dts: omap4: Correct the dma controller's property names
  ARM: dts: omap3: Correct the dma controller's property names
  ARM: dts: omap2: Correct the dma controller's property names
  ARM: dts: am437x-idk: fix sleep pinctrl state
  ARM: omap2plus_defconfig: enable TPS62362 regulator
  ARM: dts: am437x-idk: fix TPS62362 i2c bus
  ARM: dts: n900: Fix offset for smc91x ethernet
  ARM: dts: n900: fix i2c bus numbering
  ARM: dts: Fix USB dts configuration for dm816x
  ARM: dts: OMAP5: Fix SATA PHY node
  ARM: dts: DRA7: Fix SATA PHY node
parents 8d20a3dd 4a3a6f86
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Showing with 190 additions and 72 deletions
arch/arm/boot/dts/am335x-bone-common.dtsi
View file @ 895c8b7b
...@@ -195,6 +195,7 @@ &usb1_phy { ...@@ -195,6 +195,7 @@ &usb1_phy {
&usb0 { &usb0 {
status = "okay"; status = "okay";
dr_mode = "peripheral";
}; };
&usb1 { &usb1 {
......
arch/arm/boot/dts/am437x-idk-evm.dts
View file @ 895c8b7b
...@@ -133,20 +133,6 @@ i2c0_pins_sleep: i2c0_pins_sleep { ...@@ -133,20 +133,6 @@ i2c0_pins_sleep: i2c0_pins_sleep {
>; >;
}; };
i2c1_pins_default: i2c1_pins_default {
pinctrl-single,pins = <
0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
>;
};
i2c1_pins_sleep: i2c1_pins_sleep {
pinctrl-single,pins = <
0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
>;
};
mmc1_pins_default: pinmux_mmc1_pins_default { mmc1_pins_default: pinmux_mmc1_pins_default {
pinctrl-single,pins = < pinctrl-single,pins = <
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
...@@ -254,7 +240,7 @@ &i2c0 { ...@@ -254,7 +240,7 @@ &i2c0 {
status = "okay"; status = "okay";
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c0_pins_default>; pinctrl-0 = <&i2c0_pins_default>;
pinctrl-1 = <&i2c0_pins_default>; pinctrl-1 = <&i2c0_pins_sleep>;
clock-frequency = <400000>; clock-frequency = <400000>;
at24@50 { at24@50 {
...@@ -262,17 +248,10 @@ at24@50 { ...@@ -262,17 +248,10 @@ at24@50 {
pagesize = <64>; pagesize = <64>;
reg = <0x50>; reg = <0x50>;
}; };
};
&i2c1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_pins_default>;
pinctrl-1 = <&i2c1_pins_default>;
clock-frequency = <400000>;
tps: tps62362@60 { tps: tps62362@60 {
compatible = "ti,tps62362"; compatible = "ti,tps62362";
reg = <0x60>;
regulator-name = "VDD_MPU"; regulator-name = "VDD_MPU";
regulator-min-microvolt = <950000>; regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1330000>; regulator-max-microvolt = <1330000>;
......
arch/arm/boot/dts/am57xx-beagle-x15.dts
View file @ 895c8b7b
...@@ -549,14 +549,6 @@ &usb1 { ...@@ -549,14 +549,6 @@ &usb1 {
pinctrl-0 = <&usb1_pins>; pinctrl-0 = <&usb1_pins>;
}; };
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&usb2 { &usb2 {
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };
arch/arm/boot/dts/dm8168-evm.dts
View file @ 895c8b7b
...@@ -35,6 +35,18 @@ DM816X_IOPAD(0x0aa8, PIN_INPUT | MUX_MODE0) /* SPI_D0 */ ...@@ -35,6 +35,18 @@ DM816X_IOPAD(0x0aa8, PIN_INPUT | MUX_MODE0) /* SPI_D0 */
DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */ DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */
>; >;
}; };
usb0_pins: pinmux_usb0_pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */
>;
};
usb1_pins: pinmux_usb0_pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB1_DRVVBUS */
>;
};
}; };
&i2c1 { &i2c1 {
...@@ -127,3 +139,16 @@ m25p80@0 { ...@@ -127,3 +139,16 @@ m25p80@0 {
&mmc1 { &mmc1 {
vmmc-supply = <&vmmcsd_fixed>; vmmc-supply = <&vmmcsd_fixed>;
}; };
/* At least dm8168-evm rev c won't support multipoint, later may */
&usb0 {
pinctrl-names = "default";
pinctrl-0 = <&usb0_pins>;
mentor,multipoint = <0>;
};
&usb1 {
pinctrl-names = "default";
pinctrl-0 = <&usb1_pins>;
mentor,multipoint = <0>;
};
arch/arm/boot/dts/dm816x.dtsi
View file @ 895c8b7b
...@@ -97,10 +97,31 @@ dm816x_pinmux: pinmux@800 { ...@@ -97,10 +97,31 @@ dm816x_pinmux: pinmux@800 {
/* Device Configuration Registers */ /* Device Configuration Registers */
scm_conf: syscon@600 { scm_conf: syscon@600 {
compatible = "syscon"; compatible = "syscon", "simple-bus";
reg = <0x600 0x110>; reg = <0x600 0x110>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x600 0x110>;
usb_phy0: usb-phy@20 {
compatible = "ti,dm8168-usb-phy";
reg = <0x20 0x8>;
reg-names = "phy";
clocks = <&main_fapll 6>;
clock-names = "refclk";
#phy-cells = <0>;
syscon = <&scm_conf>;
};
usb_phy1: usb-phy@28 {
compatible = "ti,dm8168-usb-phy";
reg = <0x28 0x8>;
reg-names = "phy";
clocks = <&main_fapll 6>;
clock-names = "refclk";
#phy-cells = <0>;
syscon = <&scm_conf>;
};
}; };
scrm_clocks: clocks { scrm_clocks: clocks {
...@@ -357,7 +378,10 @@ usb0: usb@47401000 { ...@@ -357,7 +378,10 @@ usb0: usb@47401000 {
reg-names = "mc", "control"; reg-names = "mc", "control";
interrupts = <18>; interrupts = <18>;
interrupt-names = "mc"; interrupt-names = "mc";
dr_mode = "otg"; dr_mode = "host";
interface-type = <0>;
phys = <&usb_phy0>;
phy-names = "usb2-phy";
mentor,multipoint = <1>; mentor,multipoint = <1>;
mentor,num-eps = <16>; mentor,num-eps = <16>;
mentor,ram-bits = <12>; mentor,ram-bits = <12>;
...@@ -366,13 +390,15 @@ usb0: usb@47401000 { ...@@ -366,13 +390,15 @@ usb0: usb@47401000 {
usb1: usb@47401800 { usb1: usb@47401800 {
compatible = "ti,musb-am33xx"; compatible = "ti,musb-am33xx";
status = "disabled";
reg = <0x47401c00 0x400 reg = <0x47401c00 0x400
0x47401800 0x200>; 0x47401800 0x200>;
reg-names = "mc", "control"; reg-names = "mc", "control";
interrupts = <19>; interrupts = <19>;
interrupt-names = "mc"; interrupt-names = "mc";
dr_mode = "otg"; dr_mode = "host";
interface-type = <0>;
phys = <&usb_phy1>;
phy-names = "usb2-phy";
mentor,multipoint = <1>; mentor,multipoint = <1>;
mentor,num-eps = <16>; mentor,num-eps = <16>;
mentor,ram-bits = <12>; mentor,ram-bits = <12>;
......
arch/arm/boot/dts/dra7-evm.dts
View file @ 895c8b7b
...@@ -543,14 +543,6 @@ partition@9 { ...@@ -543,14 +543,6 @@ partition@9 {
}; };
}; };
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&usb1 { &usb1 {
dr_mode = "peripheral"; dr_mode = "peripheral";
pinctrl-names = "default"; pinctrl-names = "default";
......
arch/arm/boot/dts/dra7.dtsi
View file @ 895c8b7b
...@@ -249,8 +249,8 @@ sdma: dma-controller@4a056000 { ...@@ -249,8 +249,8 @@ sdma: dma-controller@4a056000 {
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <32>; dma-channels = <32>;
#dma-requests = <127>; dma-requests = <127>;
}; };
gpio1: gpio@4ae10000 { gpio1: gpio@4ae10000 {
...@@ -1090,8 +1090,8 @@ sata_phy: phy@4A096000 { ...@@ -1090,8 +1090,8 @@ sata_phy: phy@4A096000 {
<0x4A096800 0x40>; /* pll_ctrl */ <0x4A096800 0x40>; /* pll_ctrl */
reg-names = "phy_rx", "phy_tx", "pll_ctrl"; reg-names = "phy_rx", "phy_tx", "pll_ctrl";
ctrl-module = <&omap_control_sata>; ctrl-module = <&omap_control_sata>;
clocks = <&sys_clkin1>; clocks = <&sys_clkin1>, <&sata_ref_clk>;
clock-names = "sysclk"; clock-names = "sysclk", "refclk";
#phy-cells = <0>; #phy-cells = <0>;
}; };
......
arch/arm/boot/dts/dra72-evm.dts
View file @ 895c8b7b
...@@ -380,14 +380,6 @@ &usb2_phy2 { ...@@ -380,14 +380,6 @@ &usb2_phy2 {
phy-supply = <&ldo4_reg>; phy-supply = <&ldo4_reg>;
}; };
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&usb1 { &usb1 {
dr_mode = "peripheral"; dr_mode = "peripheral";
pinctrl-names = "default"; pinctrl-names = "default";
......
arch/arm/boot/dts/omap2.dtsi
View file @ 895c8b7b
...@@ -87,8 +87,8 @@ sdma: dma-controller@48056000 { ...@@ -87,8 +87,8 @@ sdma: dma-controller@48056000 {
<14>, <14>,
<15>; <15>;
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <32>; dma-channels = <32>;
#dma-requests = <64>; dma-requests = <64>;
}; };
i2c1: i2c@48070000 { i2c1: i2c@48070000 {
......
arch/arm/boot/dts/omap3-n900.dts
View file @ 895c8b7b
...@@ -16,6 +16,13 @@ / { ...@@ -16,6 +16,13 @@ / {
model = "Nokia N900"; model = "Nokia N900";
compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
aliases {
i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
};
cpus { cpus {
cpu@0 { cpu@0 {
cpu0-supply = <&vcc>; cpu0-supply = <&vcc>;
...@@ -704,7 +711,7 @@ ethernet@gpmc { ...@@ -704,7 +711,7 @@ ethernet@gpmc {
compatible = "smsc,lan91c94"; compatible = "smsc,lan91c94";
interrupt-parent = <&gpio2>; interrupt-parent = <&gpio2>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */ interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */ reg = <1 0 0xf>; /* 16 byte IO range */
bank-width = <2>; bank-width = <2>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&ethernet_pins>; pinctrl-0 = <&ethernet_pins>;
......
arch/arm/boot/dts/omap3.dtsi
View file @ 895c8b7b
...@@ -155,8 +155,8 @@ sdma: dma-controller@48056000 { ...@@ -155,8 +155,8 @@ sdma: dma-controller@48056000 {
<14>, <14>,
<15>; <15>;
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <32>; dma-channels = <32>;
#dma-requests = <96>; dma-requests = <96>;
}; };
omap3_pmx_core: pinmux@48002030 { omap3_pmx_core: pinmux@48002030 {
......
arch/arm/boot/dts/omap4.dtsi
View file @ 895c8b7b
...@@ -223,8 +223,8 @@ sdma: dma-controller@4a056000 { ...@@ -223,8 +223,8 @@ sdma: dma-controller@4a056000 {
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <32>; dma-channels = <32>;
#dma-requests = <127>; dma-requests = <127>;
}; };
gpio1: gpio@4a310000 { gpio1: gpio@4a310000 {
......
arch/arm/boot/dts/omap5.dtsi
View file @ 895c8b7b
...@@ -238,8 +238,8 @@ sdma: dma-controller@4a056000 { ...@@ -238,8 +238,8 @@ sdma: dma-controller@4a056000 {
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <32>; dma-channels = <32>;
#dma-requests = <127>; dma-requests = <127>;
}; };
gpio1: gpio@4ae10000 { gpio1: gpio@4ae10000 {
...@@ -929,8 +929,8 @@ sata_phy: phy@4a096000 { ...@@ -929,8 +929,8 @@ sata_phy: phy@4a096000 {
<0x4A096800 0x40>; /* pll_ctrl */ <0x4A096800 0x40>; /* pll_ctrl */
reg-names = "phy_rx", "phy_tx", "pll_ctrl"; reg-names = "phy_rx", "phy_tx", "pll_ctrl";
ctrl-module = <&omap_control_sata>; ctrl-module = <&omap_control_sata>;
clocks = <&sys_clkin>; clocks = <&sys_clkin>, <&sata_ref_clk>;
clock-names = "sysclk"; clock-names = "sysclk", "refclk";
#phy-cells = <0>; #phy-cells = <0>;
}; };
}; };
......
arch/arm/configs/multi_v7_defconfig
View file @ 895c8b7b
...@@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y ...@@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y
CONFIG_ARCH_STI=y CONFIG_ARCH_STI=y
CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS=y
CONFIG_EXYNOS5420_MCPM=y CONFIG_EXYNOS5420_MCPM=y
CONFIG_ARCH_SHMOBILE_MULTI=y
CONFIG_ARCH_EMEV2=y
CONFIG_ARCH_R7S72100=y
CONFIG_ARCH_R8A73A4=y
CONFIG_ARCH_R8A7740=y
CONFIG_ARCH_R8A7779=y
CONFIG_ARCH_R8A7790=y
CONFIG_ARCH_R8A7791=y
CONFIG_ARCH_R8A7794=y
CONFIG_ARCH_SH73A0=y
CONFIG_MACH_MARZEN=y
CONFIG_ARCH_SUNXI=y CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_SIRF=y CONFIG_ARCH_SIRF=y
CONFIG_ARCH_TEGRA=y CONFIG_ARCH_TEGRA=y
...@@ -84,6 +95,8 @@ CONFIG_PCI_KEYSTONE=y ...@@ -84,6 +95,8 @@ CONFIG_PCI_KEYSTONE=y
CONFIG_PCI_MSI=y CONFIG_PCI_MSI=y
CONFIG_PCI_MVEBU=y CONFIG_PCI_MVEBU=y
CONFIG_PCI_TEGRA=y CONFIG_PCI_TEGRA=y
CONFIG_PCI_RCAR_GEN2=y
CONFIG_PCI_RCAR_GEN2_PCIE=y
CONFIG_PCIEPORTBUS=y CONFIG_PCIEPORTBUS=y
CONFIG_SMP=y CONFIG_SMP=y
CONFIG_NR_CPUS=8 CONFIG_NR_CPUS=8
...@@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y ...@@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMA_CMA=y CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=64 CONFIG_CMA_SIZE_MBYTES=64
CONFIG_OMAP_OCP2SCP=y CONFIG_OMAP_OCP2SCP=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
...@@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y ...@@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y
CONFIG_AHCI_TEGRA=y CONFIG_AHCI_TEGRA=y
CONFIG_SATA_HIGHBANK=y CONFIG_SATA_HIGHBANK=y
CONFIG_SATA_MV=y CONFIG_SATA_MV=y
CONFIG_SATA_RCAR=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_HIX5HD2_GMAC=y CONFIG_HIX5HD2_GMAC=y
CONFIG_SUN4I_EMAC=y CONFIG_SUN4I_EMAC=y
...@@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y ...@@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y
CONFIG_MVNETA=y CONFIG_MVNETA=y
CONFIG_KS8851=y CONFIG_KS8851=y
CONFIG_R8169=y CONFIG_R8169=y
CONFIG_SH_ETH=y
CONFIG_SMSC911X=y CONFIG_SMSC911X=y
CONFIG_STMMAC_ETH=y CONFIG_STMMAC_ETH=y
CONFIG_TI_CPSW=y CONFIG_TI_CPSW=y
CONFIG_XILINX_EMACLITE=y CONFIG_XILINX_EMACLITE=y
CONFIG_AT803X_PHY=y CONFIG_AT803X_PHY=y
CONFIG_MARVELL_PHY=y CONFIG_MARVELL_PHY=y
CONFIG_SMSC_PHY=y
CONFIG_BROADCOM_PHY=y CONFIG_BROADCOM_PHY=y
CONFIG_ICPLUS_PHY=y CONFIG_ICPLUS_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_USB_PEGASUS=y CONFIG_USB_PEGASUS=y
CONFIG_USB_USBNET=y CONFIG_USB_USBNET=y
CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC75XX=y
...@@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y ...@@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y
CONFIG_MOUSE_PS2_ELANTECH=y CONFIG_MOUSE_PS2_ELANTECH=y
CONFIG_INPUT_TOUCHSCREEN=y CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_ST1232=m
CONFIG_TOUCHSCREEN_STMPE=y CONFIG_TOUCHSCREEN_STMPE=y
CONFIG_TOUCHSCREEN_SUN4I=y CONFIG_TOUCHSCREEN_SUN4I=y
CONFIG_INPUT_MISC=y CONFIG_INPUT_MISC=y
CONFIG_INPUT_MPU3050=y CONFIG_INPUT_MPU3050=y
CONFIG_INPUT_AXP20X_PEK=y CONFIG_INPUT_AXP20X_PEK=y
CONFIG_INPUT_ADXL34X=m
CONFIG_SERIO_AMBAKMI=y CONFIG_SERIO_AMBAKMI=y
CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_EM=y
CONFIG_SERIAL_8250_MT6577=y CONFIG_SERIAL_8250_MT6577=y
CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
...@@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y ...@@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y
CONFIG_SERIAL_TEGRA=y CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_VT8500=y CONFIG_SERIAL_VT8500=y
...@@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y ...@@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_CADENCE=y CONFIG_I2C_CADENCE=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_GPIO=m
CONFIG_I2C_EXYNOS5=y CONFIG_I2C_EXYNOS5=y
CONFIG_I2C_MV64XXX=y CONFIG_I2C_MV64XXX=y
CONFIG_I2C_RIIC=y
CONFIG_I2C_S3C2410=y CONFIG_I2C_S3C2410=y
CONFIG_I2C_SH_MOBILE=y
CONFIG_I2C_SIRF=y CONFIG_I2C_SIRF=y
CONFIG_I2C_TEGRA=y
CONFIG_I2C_ST=y CONFIG_I2C_ST=y
CONFIG_SPI=y CONFIG_I2C_TEGRA=y
CONFIG_I2C_XILINX=y CONFIG_I2C_XILINX=y
CONFIG_SPI_DAVINCI=y CONFIG_I2C_RCAR=y
CONFIG_SPI=y
CONFIG_SPI_CADENCE=y CONFIG_SPI_CADENCE=y
CONFIG_SPI_DAVINCI=y
CONFIG_SPI_OMAP24XX=y CONFIG_SPI_OMAP24XX=y
CONFIG_SPI_ORION=y CONFIG_SPI_ORION=y
CONFIG_SPI_PL022=y CONFIG_SPI_PL022=y
CONFIG_SPI_RSPI=y
CONFIG_SPI_SH_MSIOF=m
CONFIG_SPI_SH_HSPI=y
CONFIG_SPI_SIRF=y CONFIG_SPI_SIRF=y
CONFIG_SPI_SUN4I=y CONFIG_SPI_SUN4I=y
CONFIG_SPI_SUN6I=y CONFIG_SPI_SUN6I=y
...@@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y ...@@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y
CONFIG_PINCTRL_APQ8084=y CONFIG_PINCTRL_APQ8084=y
CONFIG_GPIO_SYSFS=y CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_GENERIC_PLATFORM=y CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_DAVINCI=y CONFIG_GPIO_DAVINCI=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_EM=y
CONFIG_GPIO_RCAR=y
CONFIG_GPIO_XILINX=y CONFIG_GPIO_XILINX=y
CONFIG_GPIO_ZYNQ=y CONFIG_GPIO_ZYNQ=y
CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_TWL4030=y CONFIG_GPIO_TWL4030=y
CONFIG_GPIO_PALMAS=y CONFIG_GPIO_PALMAS=y
CONFIG_GPIO_SYSCON=y CONFIG_GPIO_SYSCON=y
...@@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y ...@@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y
CONFIG_POWER_RESET_GPIO=y CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_KEYSTONE=y CONFIG_POWER_RESET_KEYSTONE=y
CONFIG_POWER_RESET_SUN6I=y CONFIG_POWER_RESET_SUN6I=y
CONFIG_POWER_RESET_RMOBILE=y
CONFIG_SENSORS_LM90=y CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_LM95245=y CONFIG_SENSORS_LM95245=y
CONFIG_THERMAL=y CONFIG_THERMAL=y
CONFIG_CPU_THERMAL=y CONFIG_CPU_THERMAL=y
CONFIG_RCAR_THERMAL=y
CONFIG_ARMADA_THERMAL=y CONFIG_ARMADA_THERMAL=y
CONFIG_DAVINCI_WATCHDOG CONFIG_DAVINCI_WATCHDOG
CONFIG_ST_THERMAL_SYSCFG=y CONFIG_ST_THERMAL_SYSCFG=y
...@@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y ...@@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y CONFIG_ORION_WATCHDOG=y
CONFIG_SUNXI_WATCHDOG=y CONFIG_SUNXI_WATCHDOG=y
CONFIG_MESON_WATCHDOG=y CONFIG_MESON_WATCHDOG=y
CONFIG_MFD_AS3711=y
CONFIG_MFD_AS3722=y CONFIG_MFD_AS3722=y
CONFIG_MFD_BCM590XX=y CONFIG_MFD_BCM590XX=y
CONFIG_MFD_AXP20X=y CONFIG_MFD_AXP20X=y
...@@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y ...@@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y
CONFIG_MFD_TPS6586X=y CONFIG_MFD_TPS6586X=y
CONFIG_MFD_TPS65910=y CONFIG_MFD_TPS65910=y
CONFIG_REGULATOR_AB8500=y CONFIG_REGULATOR_AB8500=y
CONFIG_REGULATOR_AS3711=y
CONFIG_REGULATOR_AS3722=y CONFIG_REGULATOR_AS3722=y
CONFIG_REGULATOR_AXP20X=y CONFIG_REGULATOR_AXP20X=y
CONFIG_REGULATOR_BCM590XX=y CONFIG_REGULATOR_BCM590XX=y
CONFIG_REGULATOR_DA9210=y
CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_GPIO=y
CONFIG_MFD_SYSCON=y CONFIG_MFD_SYSCON=y
CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON=y
CONFIG_REGULATOR_MAX8907=y CONFIG_REGULATOR_MAX8907=y
CONFIG_REGULATOR_MAX8973=y
CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_MAX77686=y
CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_PALMAS=y
CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S2MPS11=y
...@@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y ...@@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y
CONFIG_REGULATOR_VEXPRESS=y CONFIG_REGULATOR_VEXPRESS=y
CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_MEDIA_USB_SUPPORT=y CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=y CONFIG_USB_VIDEO_CLASS=y
CONFIG_USB_GSPCA=y CONFIG_USB_GSPCA=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=m
CONFIG_SOC_CAMERA_PLATFORM=m
CONFIG_VIDEO_RCAR_VIN=m
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_RENESAS_VSP1=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=m
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_RCAR_DU=m
CONFIG_DRM_TEGRA=y CONFIG_DRM_TEGRA=y
CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_FB_ARMCLCD=y CONFIG_FB_ARMCLCD=y
CONFIG_FB_WM8505=y CONFIG_FB_WM8505=y
CONFIG_FB_SH_MOBILE_LCDC=y
CONFIG_FB_SIMPLE=y CONFIG_FB_SIMPLE=y
CONFIG_FB_SH_MOBILE_MERAM=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y CONFIG_BACKLIGHT_PWM=y
CONFIG_BACKLIGHT_AS3711=y
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_SOUND=y CONFIG_SOUND=y
...@@ -343,6 +397,8 @@ CONFIG_SND=y ...@@ -343,6 +397,8 @@ CONFIG_SND=y
CONFIG_SND_DYNAMIC_MINORS=y CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_USB_AUDIO=y CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y CONFIG_SND_SOC=y
CONFIG_SND_SOC_SH4_FSI=m
CONFIG_SND_SOC_RCAR=m
CONFIG_SND_SOC_TEGRA=y CONFIG_SND_SOC_TEGRA=y
CONFIG_SND_SOC_TEGRA_RT5640=y CONFIG_SND_SOC_TEGRA_RT5640=y
CONFIG_SND_SOC_TEGRA_WM8753=y CONFIG_SND_SOC_TEGRA_WM8753=y
...@@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y ...@@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y
CONFIG_SND_SOC_TEGRA_TRIMSLICE=y CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
CONFIG_SND_SOC_TEGRA_ALC5632=y CONFIG_SND_SOC_TEGRA_ALC5632=y
CONFIG_SND_SOC_TEGRA_MAX98090=y CONFIG_SND_SOC_TEGRA_MAX98090=y
CONFIG_SND_SOC_AK4642=m
CONFIG_SND_SOC_WM8978=m
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_MVEBU=y CONFIG_USB_XHCI_MVEBU=y
...@@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y ...@@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y
CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_STI=y CONFIG_USB_OHCI_HCD_STI=y
CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_R8A66597_HCD=m
CONFIG_USB_RENESAS_USBHS=m
CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y
CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA=y
...@@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y ...@@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y
CONFIG_USB_GPIO_VBUS=y CONFIG_USB_GPIO_VBUS=y
CONFIG_USB_ISP1301=y CONFIG_USB_ISP1301=y
CONFIG_USB_MXS_PHY=y CONFIG_USB_MXS_PHY=y
CONFIG_USB_RCAR_PHY=m
CONFIG_USB_RCAR_GEN2_PHY=m
CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=m
CONFIG_MMC=y CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=16 CONFIG_MMC_BLOCK_MINORS=16
CONFIG_MMC_ARMMMCI=y CONFIG_MMC_ARMMMCI=y
...@@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y ...@@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y
CONFIG_MMC_OMAP=y CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_MVSDIO=y CONFIG_MMC_MVSDIO=y
CONFIG_MMC_SUNXI=y CONFIG_MMC_SDHI=y
CONFIG_MMC_DW=y CONFIG_MMC_DW=y
CONFIG_MMC_DW_IDMAC=y CONFIG_MMC_DW_IDMAC=y
CONFIG_MMC_DW_PLTFM=y CONFIG_MMC_DW_PLTFM=y
CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_EXYNOS=y
CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SH_MMCIF=y
CONFIG_MMC_SUNXI=y
CONFIG_NEW_LEDS=y CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y CONFIG_LEDS_GPIO=y
...@@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y ...@@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y
CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_MAX8907=y CONFIG_RTC_DRV_MAX8907=y
CONFIG_RTC_DRV_MAX77686=y CONFIG_RTC_DRV_MAX77686=y
CONFIG_RTC_DRV_RS5C372=m
CONFIG_RTC_DRV_PALMAS=y CONFIG_RTC_DRV_PALMAS=y
CONFIG_RTC_DRV_TWL4030=y CONFIG_RTC_DRV_TWL4030=y
CONFIG_RTC_DRV_TPS6586X=y CONFIG_RTC_DRV_TPS6586X=y
CONFIG_RTC_DRV_TPS65910=y CONFIG_RTC_DRV_TPS65910=y
CONFIG_RTC_DRV_S35390A=m
CONFIG_RTC_DRV_EM3027=y CONFIG_RTC_DRV_EM3027=y
CONFIG_RTC_DRV_PL031=y CONFIG_RTC_DRV_PL031=y
CONFIG_RTC_DRV_VT8500=y CONFIG_RTC_DRV_VT8500=y
...@@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y ...@@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y
CONFIG_DW_DMAC=y CONFIG_DW_DMAC=y
CONFIG_MV_XOR=y CONFIG_MV_XOR=y
CONFIG_TEGRA20_APB_DMA=y CONFIG_TEGRA20_APB_DMA=y
CONFIG_SH_DMAE=y
CONFIG_RCAR_AUDMAC_PP=m
CONFIG_RCAR_DMAC=y
CONFIG_STE_DMA40=y CONFIG_STE_DMA40=y
CONFIG_SIRF_DMA=y CONFIG_SIRF_DMA=y
CONFIG_TI_EDMA=y CONFIG_TI_EDMA=y
...@@ -468,6 +539,7 @@ CONFIG_IIO=y ...@@ -468,6 +539,7 @@ CONFIG_IIO=y
CONFIG_XILINX_XADC=y CONFIG_XILINX_XADC=y
CONFIG_AK8975=y CONFIG_AK8975=y
CONFIG_PWM=y CONFIG_PWM=y
CONFIG_PWM_RENESAS_TPU=y
CONFIG_PWM_TEGRA=y CONFIG_PWM_TEGRA=y
CONFIG_PWM_VT8500=y CONFIG_PWM_VT8500=y
CONFIG_PHY_HIX5HD2_SATA=y CONFIG_PHY_HIX5HD2_SATA=y
......
arch/arm/configs/omap2plus_defconfig
View file @ 895c8b7b
...@@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y ...@@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_NAND=y CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC_BCH=y CONFIG_MTD_NAND_ECC_BCH=y
CONFIG_MTD_NAND_OMAP2=y CONFIG_MTD_NAND_OMAP2=y
CONFIG_MTD_NAND_OMAP_BCH=y
CONFIG_MTD_ONENAND=y CONFIG_MTD_ONENAND=y
CONFIG_MTD_ONENAND_VERIFY_WRITE=y CONFIG_MTD_ONENAND_VERIFY_WRITE=y
CONFIG_MTD_ONENAND_OMAP2=y CONFIG_MTD_ONENAND_OMAP2=y
...@@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y ...@@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y
CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_PALMAS=y
CONFIG_REGULATOR_PBIAS=y CONFIG_REGULATOR_PBIAS=y
CONFIG_REGULATOR_TI_ABB=y CONFIG_REGULATOR_TI_ABB=y
CONFIG_REGULATOR_TPS62360=m
CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS65023=y
CONFIG_REGULATOR_TPS6507X=y CONFIG_REGULATOR_TPS6507X=y
CONFIG_REGULATOR_TPS65217=y CONFIG_REGULATOR_TPS65217=y
...@@ -374,7 +376,7 @@ CONFIG_PWM_TIEHRPWM=m ...@@ -374,7 +376,7 @@ CONFIG_PWM_TIEHRPWM=m
CONFIG_PWM_TWL=m CONFIG_PWM_TWL=m
CONFIG_PWM_TWL_LED=m CONFIG_PWM_TWL_LED=m
CONFIG_OMAP_USB2=m CONFIG_OMAP_USB2=m
CONFIG_TI_PIPE3=m CONFIG_TI_PIPE3=y
CONFIG_EXT2_FS=y CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set # CONFIG_EXT3_FS_XATTR is not set
......
arch/arm64/boot/dts/arm/foundation-v8.dts
View file @ 895c8b7b
...@@ -34,6 +34,7 @@ cpu@0 { ...@@ -34,6 +34,7 @@ cpu@0 {
reg = <0x0 0x0>; reg = <0x0 0x0>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
}; };
cpu@1 { cpu@1 {
device_type = "cpu"; device_type = "cpu";
...@@ -41,6 +42,7 @@ cpu@1 { ...@@ -41,6 +42,7 @@ cpu@1 {
reg = <0x0 0x1>; reg = <0x0 0x1>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
}; };
cpu@2 { cpu@2 {
device_type = "cpu"; device_type = "cpu";
...@@ -48,6 +50,7 @@ cpu@2 { ...@@ -48,6 +50,7 @@ cpu@2 {
reg = <0x0 0x2>; reg = <0x0 0x2>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
}; };
cpu@3 { cpu@3 {
device_type = "cpu"; device_type = "cpu";
...@@ -55,6 +58,11 @@ cpu@3 { ...@@ -55,6 +58,11 @@ cpu@3 {
reg = <0x0 0x3>; reg = <0x0 0x3>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
};
L2_0: l2-cache0 {
compatible = "cache";
}; };
}; };
......
arch/arm64/boot/dts/arm/juno.dts
View file @ 895c8b7b
...@@ -39,6 +39,7 @@ A57_0: cpu@0 { ...@@ -39,6 +39,7 @@ A57_0: cpu@0 {
reg = <0x0 0x0>; reg = <0x0 0x0>;
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>;
}; };
A57_1: cpu@1 { A57_1: cpu@1 {
...@@ -46,6 +47,7 @@ A57_1: cpu@1 { ...@@ -46,6 +47,7 @@ A57_1: cpu@1 {
reg = <0x0 0x1>; reg = <0x0 0x1>;
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>;
}; };
A53_0: cpu@100 { A53_0: cpu@100 {
...@@ -53,6 +55,7 @@ A53_0: cpu@100 { ...@@ -53,6 +55,7 @@ A53_0: cpu@100 {
reg = <0x0 0x100>; reg = <0x0 0x100>;
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>;
}; };
A53_1: cpu@101 { A53_1: cpu@101 {
...@@ -60,6 +63,7 @@ A53_1: cpu@101 { ...@@ -60,6 +63,7 @@ A53_1: cpu@101 {
reg = <0x0 0x101>; reg = <0x0 0x101>;
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>;
}; };
A53_2: cpu@102 { A53_2: cpu@102 {
...@@ -67,6 +71,7 @@ A53_2: cpu@102 { ...@@ -67,6 +71,7 @@ A53_2: cpu@102 {
reg = <0x0 0x102>; reg = <0x0 0x102>;
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>;
}; };
A53_3: cpu@103 { A53_3: cpu@103 {
...@@ -74,6 +79,15 @@ A53_3: cpu@103 { ...@@ -74,6 +79,15 @@ A53_3: cpu@103 {
reg = <0x0 0x103>; reg = <0x0 0x103>;
device_type = "cpu"; device_type = "cpu";
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>;
};
A57_L2: l2-cache0 {
compatible = "cache";
};
A53_L2: l2-cache1 {
compatible = "cache";
}; };
}; };
......
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
View file @ 895c8b7b
...@@ -37,6 +37,7 @@ cpu@0 { ...@@ -37,6 +37,7 @@ cpu@0 {
reg = <0x0 0x0>; reg = <0x0 0x0>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
}; };
cpu@1 { cpu@1 {
device_type = "cpu"; device_type = "cpu";
...@@ -44,6 +45,7 @@ cpu@1 { ...@@ -44,6 +45,7 @@ cpu@1 {
reg = <0x0 0x1>; reg = <0x0 0x1>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
}; };
cpu@2 { cpu@2 {
device_type = "cpu"; device_type = "cpu";
...@@ -51,6 +53,7 @@ cpu@2 { ...@@ -51,6 +53,7 @@ cpu@2 {
reg = <0x0 0x2>; reg = <0x0 0x2>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
}; };
cpu@3 { cpu@3 {
device_type = "cpu"; device_type = "cpu";
...@@ -58,6 +61,11 @@ cpu@3 { ...@@ -58,6 +61,11 @@ cpu@3 {
reg = <0x0 0x3>; reg = <0x0 0x3>;
enable-method = "spin-table"; enable-method = "spin-table";
cpu-release-addr = <0x0 0x8000fff8>; cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
};
L2_0: l2-cache0 {
compatible = "cache";
}; };
}; };
......
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