Commit 8aa72064 authored by Sai Krishna Potthuri's avatar Sai Krishna Potthuri Committed by Ulf Hansson

dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net compatible

Add Xilinx Versal Net compatible to support eMMC 5.1 PHY.
Signed-off-by: default avatarSai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230403102551.3763054-2-sai.krishna.potthuri@amd.comSigned-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent ec498433
......@@ -27,6 +27,7 @@ allOf:
enum:
- xlnx,zynqmp-8.9a
- xlnx,versal-8.9a
- xlnx,versal-net-emmc
then:
properties:
clock-output-names:
......@@ -62,6 +63,10 @@ properties:
description:
For this device it is strongly suggested to include
clock-output-names and '#clock-cells'.
- const: xlnx,versal-net-emmc # Versal Net eMMC PHY
description:
For this device it is strongly suggested to include
clock-output-names and '#clock-cells'.
- items:
- const: intel,lgm-sdhci-5.1-emmc # Intel LGM eMMC PHY
- const: arasan,sdhci-5.1
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment