Commit 8b698e08 authored by Marcel Ziswiler's avatar Marcel Ziswiler Committed by Shawn Guo

ARM: dts: imx6qdl-apalis: imx6q-apalis-ixora: use i2c from dwc hdmi

Migrate to using functionally-reduced I2C master contained in the DWC
HDMI. Therefore drop the GPIO bitbanging based i2cddc definition and
modify resp. pinctrl.

While at it re-order the I2C aliases to start with the generic, followed
by the camera and concluded by the power I2C one.
Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 98d4b6c3
...@@ -55,10 +55,9 @@ / { ...@@ -55,10 +55,9 @@ / {
"fsl,imx6q"; "fsl,imx6q";
aliases { aliases {
i2c0 = &i2cddc; i2c0 = &i2c1;
i2c1 = &i2c1; i2c1 = &i2c3;
i2c2 = &i2c2; i2c2 = &i2c2;
i2c3 = &i2c3;
rtc0 = &rtc_i2c; rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc; rtc1 = &snvs_rtc;
}; };
...@@ -161,11 +160,6 @@ &can2 { ...@@ -161,11 +160,6 @@ &can2 {
}; };
&hdmi { &hdmi {
ddc-i2c-bus = <&i2cddc>;
status = "okay";
};
&i2cddc {
status = "okay"; status = "okay";
}; };
......
...@@ -56,18 +56,6 @@ backlight: backlight { ...@@ -56,18 +56,6 @@ backlight: backlight {
status = "disabled"; status = "disabled";
}; };
/* DDC_I2C: I2C2_SDA/SCL on MXM3 205/207 */
i2cddc: i2c@0 {
compatible = "i2c-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c_ddc>;
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH /* sda */
&gpio2 30 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
status = "disabled";
};
reg_1p8v: regulator-1p8v { reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "1P8V"; regulator-name = "1P8V";
...@@ -210,6 +198,12 @@ ethphy: ethernet-phy@7 { ...@@ -210,6 +198,12 @@ ethphy: ethernet-phy@7 {
}; };
}; };
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_ddc>;
status = "disabled";
};
/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
&i2c1 { &i2c1 {
clock-frequency = <100000>; clock-frequency = <100000>;
...@@ -638,11 +632,10 @@ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 ...@@ -638,11 +632,10 @@ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>; >;
}; };
pinctrl_i2c_ddc: gpioi2cddcgrp { pinctrl_hdmi_ddc: hdmiddcgrp {
fsl,pins = < fsl,pins = <
/* DDC bitbang */ MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x1b0b0
>; >;
}; };
......
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