Commit 8bbad1ba authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Thierry Reding

gpu: host1x: Program stream ID to bypass without SMMU

If SMMU support is not available, fall back to programming the bypass
stream ID (0x7f).

Fixes: de5469c2 ("gpu: host1x: Program the channel stream ID")
Suggested-by: default avatarMikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Reviewed-by: default avatarMikko Perttunen <mperttunen@nvidia.com>
[treding@nvidia.com: rebase this on top of a later build fix]
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent e154592a
...@@ -114,9 +114,13 @@ static inline void synchronize_syncpt_base(struct host1x_job *job) ...@@ -114,9 +114,13 @@ static inline void synchronize_syncpt_base(struct host1x_job *job)
static void host1x_channel_set_streamid(struct host1x_channel *channel) static void host1x_channel_set_streamid(struct host1x_channel *channel)
{ {
#if IS_ENABLED(CONFIG_IOMMU_API) && HOST1X_HW >= 6 #if HOST1X_HW >= 6
u32 sid = 0x7f;
#ifdef CONFIG_IOMMU_API
struct iommu_fwspec *spec = dev_iommu_fwspec_get(channel->dev->parent); struct iommu_fwspec *spec = dev_iommu_fwspec_get(channel->dev->parent);
u32 sid = spec ? spec->ids[0] & 0xffff : 0x7f; if (spec)
sid = spec->ids[0] & 0xffff;
#endif
host1x_ch_writel(channel, sid, HOST1X_CHANNEL_SMMU_STREAMID); host1x_ch_writel(channel, sid, HOST1X_CHANNEL_SMMU_STREAMID);
#endif #endif
......
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