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Commit 8c7da99c authored by Peter Bergner's avatar Peter Bergner
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Forward port of 2.4 ppc64 /proc/ppc64/systemcfg changes

parent 23caa503
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Showing with 641 additions and 228 deletions
arch/ppc64/kernel/LparData.c
View file @ 8c7da99c
......@@ -61,7 +61,7 @@ struct HvReleaseData hvReleaseData = {
0xc8a5d9c4, /* desc = "HvRD" ebcdic */
sizeof(struct HvReleaseData),
offsetof(struct naca_struct, xItVpdAreas),
(struct naca_struct *)(KERNELBASE+0x4000), /* 64-bit Naca address */
(struct naca_struct *)(NACA_VIRT_ADDR), /* 64-bit Naca address */
0x6000, /* offset of LparMap within loadarea (see head.S) */
0,
1, /* tags inactive */
......
arch/ppc64/kernel/Makefile
View file @ 8c7da99c
......@@ -15,7 +15,7 @@ obj-$(CONFIG_PPC_ISERIES) += iSeries_pci.o iSeries_pci_reset.o \
iSeries_IoMmTable.o iSeries_irq.o \
iSeries_VpdInfo.o XmPciLpEvent.o \
HvCall.o HvLpConfig.o LparData.o mf_proc.o \
proc_pmc.o iSeries_setup.o ItLpQueue.o hvCall.o \
iSeries_setup.o ItLpQueue.o hvCall.o \
mf.o HvLpEvent.o iSeries_proc.o
obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
......@@ -25,6 +25,7 @@ obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
obj-y += open_pic.o xics.o pSeries_htab.o rtas.o \
chrp_setup.o i8259.o ras.o prom.o
obj-$(CONFIG_PROC_FS) += proc_ppc64.o
obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o
......
arch/ppc64/kernel/asm-offsets.c
View file @ 8c7da99c
......@@ -59,14 +59,14 @@ int main(void)
/* naca */
DEFINE(PACA, offsetof(struct naca_struct, paca));
DEFINE(DCACHEL1LINESIZE, offsetof(struct naca_struct, dCacheL1LineSize));
DEFINE(DCACHEL1LINESIZE, offsetof(struct systemcfg, dCacheL1LineSize));
DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct naca_struct, dCacheL1LogLineSize));
DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct naca_struct, dCacheL1LinesPerPage));
DEFINE(ICACHEL1LINESIZE, offsetof(struct naca_struct, iCacheL1LineSize));
DEFINE(ICACHEL1LINESIZE, offsetof(struct systemcfg, iCacheL1LineSize));
DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct naca_struct, iCacheL1LogLineSize));
DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct naca_struct, iCacheL1LinesPerPage));
DEFINE(SLBSIZE, offsetof(struct naca_struct, slb_size));
DEFINE(PLATFORM, offsetof(struct naca_struct, platform));
DEFINE(PLATFORM, offsetof(struct systemcfg, platform));
/* paca */
DEFINE(PACA_SIZE, sizeof(struct paca_struct));
......
arch/ppc64/kernel/chrp_setup.c
View file @ 8c7da99c
......@@ -228,6 +228,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
#endif /* CONFIG_BLK_DEV_INITRD */
#endif
ppc_md.ppc_machine = systemcfg->platform;
ppc_md.setup_arch = chrp_setup_arch;
ppc_md.setup_residual = NULL;
ppc_md.get_cpuinfo = chrp_get_cpuinfo;
......
arch/ppc64/kernel/head.S
View file @ 8c7da99c
......@@ -29,6 +29,8 @@
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/mmu.h>
#include <asm/naca.h>
#include <asm/systemcfg.h>
#include <asm/ppc_asm.h>
#include <asm/offsets.h>
#include <asm/bug.h>
......@@ -49,8 +51,9 @@
* 0x0100 - 0x2fff : pSeries Interrupt prologs
* 0x3000 - 0x3fff : Interrupt support
* 0x4000 - 0x4fff : NACA
* 0x5000 - 0x5fff : Initial segment table
* 0x5000 - 0x5fff : SystemCfg
* 0x6000 : iSeries and common interrupt prologs
* 0x9000 - 0x9fff : Initial segment table
*/
/*
......@@ -362,11 +365,11 @@ __start_interrupts:
STD_EXCEPTION_PSERIES( 0x1300, InstructionBreakpoint )
/* Space for the naca. Architected to be located at real address
* 0x4000. Various tools rely on this location being fixed.
* NACA_PHYS_ADDR. Various tools rely on this location being fixed.
* The first dword of the naca is required by iSeries LPAR to
* point to itVpdAreas. On pSeries native, this value is not used.
*/
. = 0x4000
. = NACA_PHYS_ADDR
.globl __end_interrupts
.globl __start_naca
__end_interrupts:
......@@ -380,21 +383,14 @@ __start_naca:
.llong 0x0
.llong paca
/*
* Space for the initial segment table
* For LPAR, the hypervisor must fill in at least one entry
* before we get control (with relocate on)
*/
. = 0x5000
. = SYSTEMCFG_PHYS_ADDR
.globl __end_naca
.globl __start_stab
.globl __start_systemcfg
__end_naca:
__start_stab:
. = 0x6000
.globl __end_stab
__end_stab:
__start_systemcfg:
. = (SYSTEMCFG_PHYS_ADDR + PAGE_SIZE)
.globl __end_systemcfg
__end_systemcfg:
#ifdef CONFIG_PPC_ISERIES
/*
......@@ -408,7 +404,7 @@ __end_stab:
.llong 1 /* # ESIDs to be mapped by hypervisor */
.llong 1 /* # memory ranges to be mapped by hypervisor */
.llong 5 /* Page # of segment table within load area */
.llong STAB0_PAGE /* Page # of segment table within load area */
.llong 0 /* Reserved */
.llong 0 /* Reserved */
.llong 0 /* Reserved */
......@@ -529,6 +525,20 @@ SystemReset_FWNMI:
MachineCheck_FWNMI:
EXCEPTION_PROLOG_PSERIES(0x200, MachineCheck_common)
/*
* Space for the initial segment table
* For LPAR, the hypervisor must fill in at least one entry
* before we get control (with relocate on)
*/
. = STAB0_PHYS_ADDR
.globl __start_stab
__start_stab:
. = (STAB0_PHYS_ADDR + PAGE_SIZE)
.globl __end_stab
__end_stab:
/*** Common interrupt handlers ***/
STD_EXCEPTION_COMMON( 0x100, SystemReset, .SystemResetException )
......@@ -1252,9 +1262,12 @@ _GLOBAL(__start_initialization_iSeries)
addi r2,r2,0x4000
addi r2,r2,0x4000
LOADADDR(r9,systemcfg)
SET_REG_TO_CONST(r4, SYSTEMCFG_VIRT_ADDR)
std r4,0(r9) /* set the systemcfg pointer */
LOADADDR(r9,naca)
SET_REG_TO_CONST(r4, KERNELBASE)
addi r4,r4,0x4000
SET_REG_TO_CONST(r4, NACA_VIRT_ADDR)
std r4,0(r9) /* set the naca pointer */
/* Get the pointer to the segment table */
......@@ -1285,13 +1298,18 @@ _GLOBAL(__start_initialization_pSeries)
/* Relocate the TOC from a virt addr to a real addr */
sub r2,r2,r3
/* setup the systemcfg pointer which is needed by prom_init */
LOADADDR(r9,systemcfg)
sub r9,r9,r3 /* addr of the variable systemcfg */
SET_REG_TO_CONST(r4, SYSTEMCFG_VIRT_ADDR)
sub r4,r4,r3
std r4,0(r9) /* set the value of systemcfg */
/* setup the naca pointer which is needed by prom_init */
LOADADDR(r9,naca)
sub r9,r9,r3 /* addr of the variable naca */
SET_REG_TO_CONST(r4, KERNELBASE)
SET_REG_TO_CONST(r4, NACA_VIRT_ADDR)
sub r4,r4,r3
addi r4,r4,0x4000
std r4,0(r9) /* set the value of naca */
/* DRENG / PPPBBB Fix the following comment!!! -Peter */
......@@ -1567,8 +1585,8 @@ _GLOBAL(__secondary_start)
sc /* HvCall_setASR */
#else
/* set the ASR */
addi r3,0,0x4000 /* r3 = ptr to naca */
lhz r3,PLATFORM(r3) /* r3 = platform flags */
li r3,SYSTEMCFG_PHYS_ADDR /* r3 = ptr to systemcfg */
lwz r3,PLATFORM(r3) /* r3 = platform flags */
cmpldi r3,PLATFORM_PSERIES_LPAR
bne 98f
mfspr r3,PVR
......@@ -1647,10 +1665,16 @@ _STATIC(start_here_pSeries)
bl .reloc_offset
mr r26,r3
/* setup the systemcfg pointer which is needed by *tab_initialize */
LOADADDR(r6,systemcfg)
sub r6,r6,r26 /* addr of the variable systemcfg */
li r27,SYSTEMCFG_PHYS_ADDR
std r27,0(r6) /* set the value of systemcfg */
/* setup the naca pointer which is needed by *tab_initialize */
LOADADDR(r6,naca)
sub r6,r6,r26 /* addr of the variable naca */
li r27,0x4000
li r27,NACA_PHYS_ADDR
std r27,0(r6) /* set the value of naca */
#ifdef CONFIG_HMT
......@@ -1714,15 +1738,12 @@ _STATIC(start_here_pSeries)
sub r13,r13,r26 /* convert to physical addr */
mtspr SPRG3,r13 /* PPPBBB: Temp... -Peter */
li r3,0x5000
std r3,PACASTABREAL(r13)
LOADADDR(r24, __start_stab)
std r24,PACASTABVIRT(r13)
ld r3,PACASTABREAL(r13)
ori r4,r3,1 /* turn on valid bit */
/* set the ASR */
addi r3,0,0x4000 /* r3 = ptr to naca */
lhz r3,PLATFORM(r3) /* r3 = platform flags */
li r3,SYSTEMCFG_PHYS_ADDR /* r3 = ptr to systemcfg */
lwz r3,PLATFORM(r3) /* r3 = platform flags */
cmpldi r3,PLATFORM_PSERIES_LPAR
bne 98f
mfspr r3,PVR
......@@ -1746,8 +1767,8 @@ _STATIC(start_here_pSeries)
bl .stab_initialize
bl .htab_initialize
addi r3,0,0x4000 /* r3 = ptr to naca */
lhz r3,PLATFORM(r3) /* r3 = platform flags */
li r3,SYSTEMCFG_PHYS_ADDR /* r3 = ptr to systemcfg */
lwz r3,PLATFORM(r3) /* r3 = platform flags */
cmpldi r3,PLATFORM_PSERIES
bne 98f
LOADADDR(r6,_SDR1) /* Only if NOT LPAR */
......@@ -1796,11 +1817,14 @@ _STATIC(start_here_common)
addi r2,r2,0x4000
addi r2,r2,0x4000
/* setup the naca pointer */
LOADADDR(r9,naca)
/* setup the systemcfg pointer */
LOADADDR(r9,systemcfg)
SET_REG_TO_CONST(r8, SYSTEMCFG_VIRT_ADDR)
std r8,0(r9)
SET_REG_TO_CONST(r8, KERNELBASE)
addi r8,r8,0x4000
/* setup the naca pointer */
LOADADDR(r9,naca)
SET_REG_TO_CONST(r8, NACA_VIRT_ADDR)
std r8,0(r9) /* set the value of the naca ptr */
LOADADDR(r26, boot_cpuid)
......@@ -1951,7 +1975,7 @@ ioremap_dir:
hardware_int_paca0:
.space 8*4096
/* 1 page segment table per cpu (max 48) */
/* 1 page segment table per cpu (max 48, cpu0 allocated at STAB0_PHYS_ADDR) */
.globl stab_array
stab_array:
.space 4096 * 48
......
arch/ppc64/kernel/htab.c
View file @ 8c7da99c
......@@ -101,7 +101,7 @@ create_pte_mapping(unsigned long start, unsigned long end,
hpteg = ((hash & htab_data.htab_hash_mask)*HPTES_PER_GROUP);
if (naca->platform == PLATFORM_PSERIES_LPAR)
if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
ret = pSeries_lpar_hpte_insert(hpteg, va,
(unsigned long)__v2a(addr) >> PAGE_SHIFT,
0, mode, 1, large);
......@@ -140,7 +140,7 @@ htab_initialize(void)
htab_data.htab_num_ptegs = pteg_count;
htab_data.htab_hash_mask = pteg_count - 1;
if (naca->platform == PLATFORM_PSERIES) {
if (systemcfg->platform == PLATFORM_PSERIES) {
/* Find storage for the HPT. Must be contiguous in
* the absolute address space.
*/
......@@ -165,15 +165,15 @@ htab_initialize(void)
mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
/* XXX we currently map kernel text rw, should fix this */
if (cpu_has_largepage() && naca->physicalMemorySize > 256*MB) {
if (cpu_has_largepage() && systemcfg->physicalMemorySize > 256*MB) {
create_pte_mapping((unsigned long)KERNELBASE,
KERNELBASE + 256*MB, mode_rw, 0);
create_pte_mapping((unsigned long)KERNELBASE + 256*MB,
KERNELBASE + (naca->physicalMemorySize),
KERNELBASE + (systemcfg->physicalMemorySize),
mode_rw, 1);
} else {
create_pte_mapping((unsigned long)KERNELBASE,
KERNELBASE+(naca->physicalMemorySize),
KERNELBASE+(systemcfg->physicalMemorySize),
mode_rw, 0);
}
}
......
arch/ppc64/kernel/iSeries_setup.c
View file @ 8c7da99c
......@@ -561,13 +561,13 @@ static void __init build_iSeries_Memory_Map(void)
* which should be equal to
* nextPhysChunk
*/
naca->physicalMemorySize = chunk_to_addr(nextPhysChunk);
systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
/* Bolt kernel mappings for all of memory */
iSeries_bolt_kernel( 0, naca->physicalMemorySize );
iSeries_bolt_kernel( 0, systemcfg->physicalMemorySize );
lmb_init();
lmb_add( 0, naca->physicalMemorySize );
lmb_add( 0, systemcfg->physicalMemorySize );
lmb_analyze(); /* ?? */
lmb_reserve( 0, __pa(klimit));
......@@ -584,29 +584,28 @@ static void __init build_iSeries_Memory_Map(void)
static void __init setup_iSeries_cache_sizes(void)
{
unsigned i,n;
unsigned procIx = get_paca()->xLpPaca.xDynHvPhysicalProcIndex;
unsigned int i, n;
unsigned int procIx = get_paca()->xLpPaca.xDynHvPhysicalProcIndex;
systemcfg->iCacheL1Size = xIoHriProcessorVpd[procIx].xInstCacheSize * 1024;
systemcfg->iCacheL1LineSize = xIoHriProcessorVpd[procIx].xInstCacheOperandSize;
systemcfg->dCacheL1Size = xIoHriProcessorVpd[procIx].xDataL1CacheSizeKB * 1024;
systemcfg->dCacheL1LineSize = xIoHriProcessorVpd[procIx].xDataCacheOperandSize;
naca->iCacheL1LinesPerPage = PAGE_SIZE / systemcfg->iCacheL1LineSize;
naca->dCacheL1LinesPerPage = PAGE_SIZE / systemcfg->dCacheL1LineSize;
naca->iCacheL1LineSize = xIoHriProcessorVpd[procIx].xInstCacheOperandSize;
naca->dCacheL1LineSize = xIoHriProcessorVpd[procIx].xDataCacheOperandSize;
naca->iCacheL1LinesPerPage = PAGE_SIZE / naca->iCacheL1LineSize;
naca->dCacheL1LinesPerPage = PAGE_SIZE / naca->dCacheL1LineSize;
i = naca->iCacheL1LineSize;
i = systemcfg->iCacheL1LineSize;
n = 0;
while ((i=(i/2))) ++n;
naca->iCacheL1LogLineSize = n;
i = naca->dCacheL1LineSize;
i = systemcfg->dCacheL1LineSize;
n = 0;
while ((i=(i/2))) ++n;
naca->dCacheL1LogLineSize = n;
printk( "D-cache line size = %d (log = %d)\n",
(unsigned)naca->dCacheL1LineSize,
(unsigned)naca->dCacheL1LogLineSize );
printk( "I-cache line size = %d (log = %d)\n",
(unsigned)naca->iCacheL1LineSize,
(unsigned)naca->iCacheL1LogLineSize );
printk( "D-cache line size = %d\n", (unsigned int)systemcfg->dCacheL1LineSize);
printk( "I-cache line size = %d\n", (unsigned int)systemcfg->iCacheL1LineSize);
}
/*
......@@ -648,6 +647,11 @@ iSeries_setup_arch(void)
void * eventStack;
unsigned procIx = get_paca()->xLpPaca.xDynHvPhysicalProcIndex;
/* Add an eye catcher and the systemcfg layout version number */
strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64");
systemcfg->version.major = SYSTEMCFG_MAJOR;
systemcfg->version.minor = SYSTEMCFG_MINOR;
/* Setup the Lp Event Queue */
/* Allocate a page for the Event Stack
......@@ -696,8 +700,8 @@ iSeries_setup_arch(void)
printk("Time base frequency = %lu.%02lu\n",
tbFreqMhz,
tbFreqMhzHundreths );
printk("Processor version = %x\n",
xIoHriProcessorVpd[procIx].xPVR );
systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
printk("Processor version = %x\n", systemcfg->processor);
}
......@@ -726,9 +730,9 @@ void iSeries_setup_residual(struct seq_file *m)
seq_printf(m,"time base\t: %lu.%02luMHz\n",
tbFreqMhz, tbFreqMhzHundreths );
seq_printf(m,"i-cache\t\t: %d\n",
naca->iCacheL1LineSize);
systemcfg->iCacheL1LineSize);
seq_printf(m,"d-cache\t\t: %d\n",
naca->dCacheL1LineSize);
systemcfg->dCacheL1LineSize);
}
......
arch/ppc64/kernel/misc.S
View file @ 8c7da99c
......@@ -170,12 +170,14 @@ _GLOBAL(flush_icache_range)
*/
LOADADDR(r10,naca) /* Get Naca address */
ld r10,0(r10)
lhz r7,DCACHEL1LINESIZE(r10) /* Get cache line size */
LOADADDR(r11,systemcfg) /* Get systemcfg address */
ld r11,0(r11)
lwz r7,DCACHEL1LINESIZE(r11)/* Get cache line size */
addi r5,r7,-1
andc r6,r3,r5 /* round low to line bdy */
subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */
lhz r9,DCACHEL1LOGLINESIZE(r10) /* Get log-2 of cache line size */
lwz r9,DCACHEL1LOGLINESIZE(r10) /* Get log-2 of cache line size */
srw. r8,r8,r9 /* compute line count */
beqlr /* nothing to do? */
mtctr r8
......@@ -186,12 +188,12 @@ _GLOBAL(flush_icache_range)
/* Now invalidate the instruction cache */
lhz r7,ICACHEL1LINESIZE(r10) /* Get Icache line size */
lwz r7,ICACHEL1LINESIZE(r11) /* Get Icache line size */
addi r5,r7,-1
andc r6,r3,r5 /* round low to line bdy */
subf r8,r6,r4 /* compute length */
add r8,r8,r5
lhz r9,ICACHEL1LOGLINESIZE(r10) /* Get log-2 of Icache line size */
lwz r9,ICACHEL1LOGLINESIZE(r10) /* Get log-2 of Icache line size */
srw. r8,r8,r9 /* compute line count */
beqlr /* nothing to do? */
mtctr r8
......@@ -217,12 +219,14 @@ _GLOBAL(flush_dcache_range)
*/
LOADADDR(r10,naca) /* Get Naca address */
ld r10,0(r10)
lhz r7,DCACHEL1LINESIZE(r10) /* Get dcache line size */
LOADADDR(r11,systemcfg) /* Get systemcfg address */
ld r11,0(r11)
lwz r7,DCACHEL1LINESIZE(r11) /* Get dcache line size */
addi r5,r7,-1
andc r6,r3,r5 /* round low to line bdy */
subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */
lhz r9,DCACHEL1LOGLINESIZE(r10) /* Get log-2 of dcache line size */
lwz r9,DCACHEL1LOGLINESIZE(r10) /* Get log-2 of dcache line size */
srw. r8,r8,r9 /* compute line count */
beqlr /* nothing to do? */
mtctr r8
......@@ -249,9 +253,11 @@ _GLOBAL(__flush_dcache_icache)
/* Flush the dcache */
LOADADDR(r7,naca)
ld r7,0(r7)
LOADADDR(r8,systemcfg) /* Get systemcfg address */
ld r8,0(r8)
clrrdi r3,r3,12 /* Page align */
lhz r4,DCACHEL1LINESPERPAGE(r7) /* Get # dcache lines per page */
lhz r5,DCACHEL1LINESIZE(r7) /* Get dcache line size */
lwz r4,DCACHEL1LINESPERPAGE(r7) /* Get # dcache lines per page */
lwz r5,DCACHEL1LINESIZE(r8) /* Get dcache line size */
mr r6,r3
mtctr r4
0: dcbst 0,r6
......@@ -261,8 +267,8 @@ _GLOBAL(__flush_dcache_icache)
/* Now invalidate the icache */
lhz r4,ICACHEL1LINESPERPAGE(r7) /* Get # icache lines per page */
lhz r5,ICACHEL1LINESIZE(r7) /* Get icache line size */
lwz r4,ICACHEL1LINESPERPAGE(r7) /* Get # icache lines per page */
lwz r5,ICACHEL1LINESIZE(r8) /* Get icache line size */
mtctr r4
1: icbi 0,r3
add r3,r3,r5
......
arch/ppc64/kernel/pacaData.c
View file @ 8c7da99c
......@@ -20,6 +20,7 @@
#include <asm/paca.h>
struct naca_struct *naca;
struct systemcfg *systemcfg;
/* The Paca is an array with one entry per processor. Each contains an
* ItLpPaca, which contains the information shared between the
......@@ -65,9 +66,9 @@ struct naca_struct *naca;
struct paca_struct paca[MAX_PACAS] __page_aligned = {
#ifdef CONFIG_PPC_ISERIES
PACAINITDATA( 0, 1, &xItLpQueue, 0, 0xc000000000005000),
PACAINITDATA( 0, 1, &xItLpQueue, 0, STAB0_VIRT_ADDR),
#else
PACAINITDATA( 0, 1, 0, 0x5000, 0xc000000000005000),
PACAINITDATA( 0, 1, 0, STAB0_PHYS_ADDR, STAB0_VIRT_ADDR),
#endif
PACAINITDATA( 1, 0, 0, 0, 0),
PACAINITDATA( 2, 0, 0, 0, 0),
......
arch/ppc64/kernel/pci_dma.c
View file @ 8c7da99c
......@@ -134,7 +134,7 @@ static inline struct TceTable *get_tce_table(struct pci_dev *dev)
dev = ppc64_isabridge_dev;
if (!dev)
return NULL;
if (naca->platform == PLATFORM_ISERIES_LPAR) {
if (systemcfg->platform == PLATFORM_ISERIES_LPAR) {
return ISERIES_DEVNODE(dev)->DevTceTable;
} else {
return PCI_GET_DN(dev)->tce_table;
......@@ -732,7 +732,7 @@ void create_tce_tables(void) {
struct pci_dev *dev;
struct device_node *dn, *mydn;
if (naca->platform == PLATFORM_PSERIES_LPAR) {
if (systemcfg->platform == PLATFORM_PSERIES_LPAR) {
create_tce_tables_for_busesLP(&pci_root_buses);
}
else {
......@@ -773,7 +773,7 @@ void create_pci_bus_tce_table( unsigned long token ) {
/* - Tce Table Share between buses, */
/* - Tce Table per logical slot. */
/*****************************************************************/
if(naca->platform == PLATFORM_ISERIES_LPAR) {
if(systemcfg->platform == PLATFORM_ISERIES_LPAR) {
struct iSeries_Device_Node* DevNode = (struct iSeries_Device_Node*)token;
getTceTableParmsiSeries(DevNode,newTceTable);
......@@ -797,7 +797,7 @@ void create_pci_bus_tce_table( unsigned long token ) {
dn = (struct device_node *)token;
phb = dn->phb;
if (naca->platform == PLATFORM_PSERIES)
if (systemcfg->platform == PLATFORM_PSERIES)
getTceTableParmsPSeries(phb, dn, newTceTable);
else
getTceTableParmsPSeriesLP(phb, dn, newTceTable);
......
arch/ppc64/kernel/proc_ppc64.c 0 → 100644
View file @ 8c7da99c
/*
* arch/ppc64/kernel/proc_ppc64.c
*
* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* Change Activity:
* 2001 : mikec : Created
* 2001/06/05 : engebret : Software event count support.
* 2003/02/13 : bergner : Move PMC code to pmc.c
* End Change Activity
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/proc_fs.h>
#include <asm/proc_fs.h>
#include <asm/naca.h>
#include <asm/paca.h>
#include <asm/systemcfg.h>
#include <asm/rtas.h>
#include <asm/uaccess.h>
struct proc_ppc64_t proc_ppc64;
void proc_ppc64_create_paca(int num);
static loff_t page_map_seek( struct file *file, loff_t off, int whence);
static ssize_t page_map_read( struct file *file, char *buf, size_t nbytes, loff_t *ppos);
static int page_map_mmap( struct file *file, struct vm_area_struct *vma );
static struct file_operations page_map_fops = {
llseek: page_map_seek,
read: page_map_read,
mmap: page_map_mmap
};
static int __init proc_ppc64_init(void)
{
printk(KERN_INFO "proc_ppc64: Creating /proc/ppc64/\n");
proc_ppc64.root = proc_mkdir("ppc64", 0);
if (!proc_ppc64.root)
return 0;
proc_ppc64.naca = create_proc_entry("naca", S_IRUSR, proc_ppc64.root);
if ( proc_ppc64.naca ) {
proc_ppc64.naca->nlink = 1;
proc_ppc64.naca->data = naca;
proc_ppc64.naca->size = 4096;
proc_ppc64.naca->proc_fops = &page_map_fops;
}
proc_ppc64.systemcfg = create_proc_entry("systemcfg", S_IFREG|S_IRUGO, proc_ppc64.root);
if ( proc_ppc64.systemcfg ) {
proc_ppc64.systemcfg->nlink = 1;
proc_ppc64.systemcfg->data = systemcfg;
proc_ppc64.systemcfg->size = 4096;
proc_ppc64.systemcfg->proc_fops = &page_map_fops;
}
/* /proc/ppc64/paca/XX -- raw paca contents. Only readable to root */
proc_ppc64.paca = proc_mkdir("paca", proc_ppc64.root);
if (proc_ppc64.paca) {
unsigned long i;
for (i = 0; i < NR_CPUS; i++) {
if (!cpu_online(i))
continue;
proc_ppc64_create_paca(i);
}
}
/* Placeholder for rtas interfaces. */
proc_ppc64.rtas = proc_mkdir("rtas", proc_ppc64.root);
return 0;
}
/*
* NOTE: since paca data is always in flux the values will never be a consistant set.
* In theory it could be made consistent if we made the corresponding cpu
* copy the page for us (via an IPI). Probably not worth it.
*
*/
void proc_ppc64_create_paca(int num)
{
struct proc_dir_entry *ent;
struct paca_struct *lpaca = paca + num;
char buf[16];
sprintf(buf, "%02x", num);
ent = create_proc_entry(buf, S_IRUSR, proc_ppc64.paca);
if ( ent ) {
ent->nlink = 1;
ent->data = lpaca;
ent->size = 4096;
ent->proc_fops = &page_map_fops;
}
}
static loff_t page_map_seek( struct file *file, loff_t off, int whence)
{
loff_t new;
struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode);
switch(whence) {
case 0:
new = off;
break;
case 1:
new = file->f_pos + off;
break;
case 2:
new = dp->size + off;
break;
default:
return -EINVAL;
}
if ( new < 0 || new > dp->size )
return -EINVAL;
return (file->f_pos = new);
}
static ssize_t page_map_read( struct file *file, char *buf, size_t nbytes, loff_t *ppos)
{
unsigned pos = *ppos;
struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode);
if ( pos >= dp->size )
return 0;
if ( nbytes >= dp->size )
nbytes = dp->size;
if ( pos + nbytes > dp->size )
nbytes = dp->size - pos;
copy_to_user( buf, (char *)dp->data + pos, nbytes );
*ppos = pos + nbytes;
return nbytes;
}
static int page_map_mmap( struct file *file, struct vm_area_struct *vma )
{
struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode);
vma->vm_flags |= VM_SHM | VM_LOCKED;
if ((vma->vm_end - vma->vm_start) > dp->size)
return -EINVAL;
remap_page_range( vma, vma->vm_start, __pa(dp->data), dp->size, vma->vm_page_prot );
return 0;
}
fs_initcall(proc_ppc64_init);
arch/ppc64/kernel/prom.c
View file @ 8c7da99c
This diff is collapsed.
arch/ppc64/kernel/rtas-proc.c
View file @ 8c7da99c
......@@ -201,7 +201,7 @@ void proc_rtas_init(void)
struct proc_dir_entry *entry;
rtas_node = find_devices("rtas");
if ((rtas_node == NULL) || (naca->platform == PLATFORM_ISERIES_LPAR)) {
if ((rtas_node == NULL) || (systemcfg->platform == PLATFORM_ISERIES_LPAR)) {
return;
}
......
arch/ppc64/kernel/rtas.c
View file @ 8c7da99c
......@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <asm/prom.h>
#include <asm/proc_fs.h>
#include <asm/rtas.h>
#include <asm/semaphore.h>
#include <asm/machdep.h>
......@@ -27,7 +28,6 @@
#include <asm/abs_addr.h>
#include <asm/udbg.h>
struct proc_dir_entry *rtas_proc_dir; /* /proc/ppc64/rtas dir */
struct flash_block_list_header rtas_firmware_flash_list = {0, 0};
/*
......@@ -283,7 +283,7 @@ rtas_halt(void)
rtas_power_off();
}
EXPORT_SYMBOL(rtas_proc_dir);
EXPORT_SYMBOL(proc_ppc64);
EXPORT_SYMBOL(rtas_firmware_flash_list);
EXPORT_SYMBOL(rtas_token);
EXPORT_SYMBOL(rtas_call);
......
arch/ppc64/kernel/rtas_flash.c
View file @ 8c7da99c
......@@ -210,7 +210,7 @@ int __init rtas_flash_init(void)
{
struct proc_dir_entry *ent = NULL;
if (!rtas_proc_dir) {
if (!proc_ppc64.rtas) {
printk(KERN_WARNING "rtas proc dir does not already exist");
return -ENOENT;
}
......@@ -218,7 +218,7 @@ int __init rtas_flash_init(void)
if (rtas_token("ibm,update-flash-64-and-reboot") != RTAS_UNKNOWN_SERVICE)
flash_possible = 1;
if ((ent = create_proc_entry(FIRMWARE_FLASH_NAME, S_IRUSR | S_IWUSR, rtas_proc_dir)) != NULL) {
if ((ent = create_proc_entry(FIRMWARE_FLASH_NAME, S_IRUSR | S_IWUSR, proc_ppc64.rtas)) != NULL) {
ent->nlink = 1;
ent->proc_fops = &rtas_flash_operations;
ent->owner = THIS_MODULE;
......@@ -228,9 +228,9 @@ int __init rtas_flash_init(void)
void __exit rtas_flash_cleanup(void)
{
if (!rtas_proc_dir)
if (!proc_ppc64.rtas)
return;
remove_proc_entry(FIRMWARE_FLASH_NAME, rtas_proc_dir);
remove_proc_entry(FIRMWARE_FLASH_NAME, proc_ppc64.rtas);
}
module_init(rtas_flash_init);
......
arch/ppc64/kernel/setup.c
View file @ 8c7da99c
......@@ -156,10 +156,10 @@ void setup_system(unsigned long r3, unsigned long r4, unsigned long r5,
#ifdef CONFIG_PPC_ISERIES
/* pSeries systems are identified in prom.c via OF. */
if ( itLpNaca.xLparInstalled == 1 )
naca->platform = PLATFORM_ISERIES_LPAR;
systemcfg->platform = PLATFORM_ISERIES_LPAR;
#endif
switch (naca->platform) {
switch (systemcfg->platform) {
#ifdef CONFIG_PPC_ISERIES
case PLATFORM_ISERIES_LPAR:
iSeries_init_early();
......@@ -185,7 +185,7 @@ void setup_system(unsigned long r3, unsigned long r4, unsigned long r5,
#endif
}
if (naca->platform & PLATFORM_PSERIES) {
if (systemcfg->platform & PLATFORM_PSERIES) {
early_console_initialized = 1;
register_console(&udbg_console);
}
......@@ -193,32 +193,27 @@ void setup_system(unsigned long r3, unsigned long r4, unsigned long r5,
printk("Starting Linux PPC64 %s\n", UTS_RELEASE);
printk("-----------------------------------------------------\n");
printk("naca = 0x%p\n", naca);
#if 0
printk("naca->processorCount = 0x%x\n", naca->processorCount);
#endif
printk("naca->physicalMemorySize = 0x%lx\n", naca->physicalMemorySize);
printk("naca->dCacheL1LineSize = 0x%x\n", naca->dCacheL1LineSize);
printk("naca->dCacheL1LogLineSize = 0x%x\n", naca->dCacheL1LogLineSize);
printk("naca->dCacheL1LinesPerPage = 0x%x\n", naca->dCacheL1LinesPerPage);
printk("naca->iCacheL1LineSize = 0x%x\n", naca->iCacheL1LineSize);
printk("naca->iCacheL1LogLineSize = 0x%x\n", naca->iCacheL1LogLineSize);
printk("naca->iCacheL1LinesPerPage = 0x%x\n", naca->iCacheL1LinesPerPage);
printk("naca->pftSize = 0x%lx\n", naca->pftSize);
printk("naca->debug_switch = 0x%lx\n", naca->debug_switch);
printk("naca->interrupt_controller = 0x%d\n", naca->interrupt_controller);
printk("htab_data.htab = 0x%p\n", htab_data.htab);
printk("htab_data.num_ptegs = 0x%lx\n", htab_data.htab_num_ptegs);
printk("naca = 0x%p\n", naca);
printk("naca->pftSize = 0x%lx\n", naca->pftSize);
printk("naca->debug_switch = 0x%lx\n", naca->debug_switch);
printk("naca->interrupt_controller = 0x%d\n", naca->interrupt_controller);
printk("systemcf = 0x%p\n", systemcfg);
printk("systemcfg->processorCount = 0x%x\n", systemcfg->processorCount);
printk("systemcfg->physicalMemorySize = 0x%lx\n", systemcfg->physicalMemorySize);
printk("systemcfg->dCacheL1LineSize = 0x%x\n", systemcfg->dCacheL1LineSize);
printk("systemcfg->iCacheL1LineSize = 0x%x\n", systemcfg->iCacheL1LineSize);
printk("htab_data.htab = 0x%p\n", htab_data.htab);
printk("htab_data.num_ptegs = 0x%lx\n", htab_data.htab_num_ptegs);
printk("-----------------------------------------------------\n");
if (naca->platform & PLATFORM_PSERIES) {
if (systemcfg->platform & PLATFORM_PSERIES) {
finish_device_tree();
chrp_init(r3, r4, r5, r6, r7);
}
mm_init_ppc64();
switch (naca->platform) {
switch (systemcfg->platform) {
#ifdef CONFIG_PPC_ISERIES
case PLATFORM_ISERIES_LPAR:
iSeries_init();
......@@ -312,7 +307,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
* Assume here that all clock rates are the same in a
* smp system. -- Cort
*/
if (naca->platform != PLATFORM_ISERIES_LPAR) {
if (systemcfg->platform != PLATFORM_ISERIES_LPAR) {
struct device_node *cpu_node;
int *fp;
......@@ -516,8 +511,8 @@ void __init setup_arch(char **cmdline_p)
* Systems with OF can look in the properties on the cpu node(s)
* for a possibly more accurate value.
*/
dcache_bsize = naca->dCacheL1LineSize;
icache_bsize = naca->iCacheL1LineSize;
dcache_bsize = systemcfg->dCacheL1LineSize;
icache_bsize = systemcfg->iCacheL1LineSize;
/* reboot on panic */
panic_timeout = 180;
......
arch/ppc64/kernel/smp.c
View file @ 8c7da99c
......@@ -190,7 +190,7 @@ void __init smp_init_iSeries(void)
smp_ops->kick_cpu = smp_iSeries_kick_cpu;
smp_ops->setup_cpu = smp_iSeries_setup_cpu;
#warning fix for iseries
naca->processorCount = smp_iSeries_numProcs();
systemcfg->processorCount = smp_iSeries_numProcs();
}
#endif
......@@ -354,7 +354,7 @@ void __init smp_init_pSeries(void)
smp_ops->probe = smp_xics_probe;
}
if (naca->platform == PLATFORM_PSERIES) {
if (systemcfg->platform == PLATFORM_PSERIES) {
smp_ops->give_timebase = pSeries_give_timebase;
smp_ops->take_timebase = pSeries_take_timebase;
}
......
arch/ppc64/kernel/udbg.c
View file @ 8c7da99c
......@@ -176,7 +176,7 @@ udbg_puthex(unsigned long val)
void
udbg_printSP(const char *s)
{
if (naca->platform == PLATFORM_PSERIES) {
if (systemcfg->platform == PLATFORM_PSERIES) {
unsigned long sp;
asm("mr %0,1" : "=r" (sp) :);
if (s)
......
arch/ppc64/kernel/xics.c
View file @ 8c7da99c
......@@ -386,7 +386,7 @@ xics_init_IRQ( void )
xics_irq_8259_cascade = virt_irq_create_mapping(xics_irq_8259_cascade_real);
}
if (naca->platform == PLATFORM_PSERIES) {
if (systemcfg->platform == PLATFORM_PSERIES) {
#ifdef CONFIG_SMP
for (i = 0; i < NR_CPUS; ++i) {
if (!cpu_possible(i))
......@@ -402,7 +402,7 @@ xics_init_IRQ( void )
/* actually iSeries does not use any of xics...but it has link dependencies
* for now, except this new one...
*/
} else if (naca->platform == PLATFORM_PSERIES_LPAR) {
} else if (systemcfg->platform == PLATFORM_PSERIES_LPAR) {
ops = &pSeriesLP_ops;
#endif
}
......
arch/ppc64/xmon/xmon.c
View file @ 8c7da99c
......@@ -453,7 +453,7 @@ insert_bpts()
int i;
struct bpt *bp;
if (naca->platform != PLATFORM_PSERIES)
if (systemcfg->platform != PLATFORM_PSERIES)
return;
bp = bpts;
for (i = 0; i < NBPTS; ++i, ++bp) {
......@@ -484,7 +484,7 @@ remove_bpts()
struct bpt *bp;
unsigned instr;
if (naca->platform != PLATFORM_PSERIES)
if (systemcfg->platform != PLATFORM_PSERIES)
return;
if (!__is_processor(PV_POWER4) && !__is_processor(PV_POWER4p)) {
set_dabr(0);
......
include/asm-ppc64/machdep.h
View file @ 8c7da99c
......@@ -90,6 +90,8 @@ struct machdep_calls {
unsigned char (*udbg_getc)(void);
int (*udbg_getc_poll)(void);
/* this is for modules, since _machine can be a define -- Cort */
int ppc_machine;
#ifdef CONFIG_SMP
/* functions for dealing with other cpus */
struct smp_ops_t smp_ops;
......
include/asm-ppc64/mmu.h
View file @ 8c7da99c
......@@ -221,6 +221,13 @@ static inline void _tlbiel(unsigned long va)
#endif /* __ASSEMBLY__ */
/*
* Location of cpu0's segment table
*/
#define STAB0_PAGE 0x9
#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
#define STAB0_VIRT_ADDR (KERNELBASE+STAB0_PHYS_ADDR)
/* Block size masks */
#define BL_128K 0x000
#define BL_256K 0x001
......
include/asm-ppc64/naca.h
View file @ 8c7da99c
......@@ -11,29 +11,41 @@
*/
#include <asm/types.h>
#include <asm/systemcfg.h>
#ifndef __ASSEMBLY__
struct naca_struct {
void *xItVpdAreas;
void *xRamDisk;
u64 xRamDiskSize; /* In pages */
struct paca_struct *paca; /* Ptr to an array of pacas */
u64 debug_switch; /* Bits to control debug printing */
u16 dCacheL1LineSize; /* Line size of L1 DCache in bytes */
u16 dCacheL1LogLineSize; /* Log-2 of DCache line size */
u16 dCacheL1LinesPerPage; /* DCache lines per page */
u16 iCacheL1LineSize; /* Line size of L1 ICache in bytes */
u16 iCacheL1LogLineSize; /* Log-2 of ICache line size */
u16 iCacheL1LinesPerPage; /* ICache lines per page */
u16 slb_size; /* SLB size in entries */
u64 physicalMemorySize; /* Size of real memory in bytes */
u64 pftSize; /* Log base 2 of page table size */
u64 serialPortAddr; /* Phyical address of serial port */
u8 interrupt_controller; /* Type of interrupt controller */
u8 resv0; /* Type of interrupt controller */
u16 platform; /* Platform flags */
u8 resv1[12]; /* Padding */
/*==================================================================
* Cache line 1: 0x0000 - 0x007F
* Kernel only data - undefined for user space
*==================================================================
*/
void *xItVpdAreas; /* VPD Data 0x00 */
void *xRamDisk; /* iSeries ramdisk 0x08 */
u64 xRamDiskSize; /* In pages 0x10 */
struct paca_struct *paca; /* Ptr to an array of pacas 0x18 */
u64 debug_switch; /* Debug print control 0x20 */
u64 banner; /* Ptr to banner string 0x28 */
u64 log; /* Ptr to log buffer 0x30 */
u64 serialPortAddr; /* Phy addr of serial port 0x38 */
u64 interrupt_controller; /* Type of int controller 0x40 */
u64 slb_size; /* SLB size in entries 0x48 */
u64 pftSize; /* Log 2 of page table size 0x50 */
void *systemcfg; /* Pointer to systemcfg data 0x58 */
u32 dCacheL1LogLineSize; /* L1 d-cache line size Log2 0x60 */
u32 dCacheL1LinesPerPage; /* L1 d-cache lines / page 0x64 */
u32 iCacheL1LogLineSize; /* L1 i-cache line size Log2 0x68 */
u32 iCacheL1LinesPerPage; /* L1 i-cache lines / page 0x6c */
u64 resv0[2]; /* Reserved 0x70 - 0x7F */
};
extern struct naca_struct *naca;
#endif /* __ASSEMBLY__ */
#define NACA_PAGE 0x4
#define NACA_PHYS_ADDR (NACA_PAGE<<PAGE_SHIFT)
#define NACA_VIRT_ADDR (KERNELBASE+NACA_PHYS_ADDR)
#endif /* _NACA_H */
include/asm-ppc64/page.h
View file @ 8c7da99c
......@@ -14,7 +14,11 @@
/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT 12
#define PAGE_SIZE (1UL << PAGE_SHIFT)
#ifndef __ASSEMBLY__
# define PAGE_SIZE (1UL << PAGE_SHIFT)
#else
# define PAGE_SIZE (1 << PAGE_SHIFT)
#endif
#define PAGE_MASK (~(PAGE_SIZE-1))
#define PAGE_OFFSET_MASK (PAGE_SIZE-1)
......@@ -22,6 +26,19 @@
#define SID_MASK 0xfffffffff
#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
/* align addr on a size boundary - adjust address up/down if needed */
#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
/* align addr on a size boundary - adjust address up if needed */
#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
/* to align the pointer to the (next) double word boundary */
#define DOUBLEWORD_ALIGN(addr) _ALIGN(addr,sizeof(unsigned long))
/* to align the pointer to the (next) page boundary */
#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
#include <asm/naca.h>
......@@ -37,7 +54,7 @@ static __inline__ void clear_page(void *addr)
{
unsigned long lines, line_size;
line_size = naca->dCacheL1LineSize;
line_size = systemcfg->dCacheL1LineSize;
lines = naca->dCacheL1LinesPerPage;
__asm__ __volatile__(
......@@ -114,19 +131,6 @@ static inline int get_order(unsigned long size)
#endif /* __ASSEMBLY__ */
/* align addr on a size boundary - adjust address up/down if needed */
#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
/* align addr on a size boundary - adjust address up if needed */
#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
/* to align the pointer to the (next) double word boundary */
#define DOUBLEWORD_ALIGN(addr) _ALIGN(addr,sizeof(unsigned long))
/* to align the pointer to the (next) page boundary */
#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
#ifdef MODULE
#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
#else
......
include/asm-ppc64/proc_fs.h
View file @ 8c7da99c
......@@ -25,9 +25,14 @@
#include <linux/proc_fs.h>
void pmc_proc_init(struct proc_dir_entry *iSeries_proc);
void proc_ppc64_init(void);
struct proc_ppc64_t {
struct proc_dir_entry *root;
struct proc_dir_entry *naca;
struct proc_dir_entry *paca;
struct proc_dir_entry *systemcfg;
struct proc_dir_entry *rtas;
};
#include <asm/iSeries/iSeries_proc.h>
extern struct proc_ppc64_t proc_ppc64;
#endif
#endif /* _PPC64_PROC_FS_H */
include/asm-ppc64/rtas.h
View file @ 8c7da99c
......@@ -166,8 +166,6 @@ extern void rtas_restart(char *cmd);
extern void rtas_power_off(void);
extern void rtas_halt(void);
extern struct proc_dir_entry *rtas_proc_dir;
/* Some RTAS ops require a data buffer and that buffer must be < 4G.
* Rather than having a memory allocator, just use this buffer
* (get the lock first), make the RTAS call. Copy the data instead
......
include/asm-ppc64/systemcfg.h 0 → 100644
View file @ 8c7da99c
#ifndef _SYSTEMCFG_H
#define _SYSTEMCFG_H
/*
* Copyright (C) 2002 Peter Bergner <bergner@vnet.ibm.com>, IBM
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/* Change Activity:
* 2002/09/30 : bergner : Created
* End Change Activity
*/
#ifndef __KERNEL__
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <linux/types.h>
#endif
/*
* If the major version changes we are incompatible.
* Minor version changes are a hint.
*/
#define SYSTEMCFG_MAJOR 1
#define SYSTEMCFG_MINOR 0
#ifndef __ASSEMBLY__
struct systemcfg {
__u8 eye_catcher[16]; /* Eyecatcher: SYSTEMCFG:PPC64 0x00 */
struct { /* Systemcfg version numbers */
__u32 major; /* Major number 0x10 */
__u32 minor; /* Minor number 0x14 */
} version;
__u32 platform; /* Platform flags 0x18 */
__u32 processor; /* Processor type 0x1C */
__u64 processorCount; /* # of physical processors 0x20 */
__u64 physicalMemorySize; /* Size of real memory(B) 0x28 */
__u64 tb_orig_stamp; /* Timebase at boot 0x30 */
__u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */
__u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */
__u64 stamp_xsec; /* 0x48 */
__u64 tb_update_count; /* Timebase atomicity ctr 0x50 */
__u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */
__u32 tz_dsttime; /* Type of dst correction 0x5C */
__u32 dCacheL1Size; /* L1 d-cache size 0x60 */
__u32 dCacheL1LineSize; /* L1 d-cache line size 0x64 */
__u32 iCacheL1Size; /* L1 i-cache size 0x68 */
__u32 iCacheL1LineSize; /* L1 i-cache line size 0x6C */
__u8 reserved0[3984]; /* Reserve rest of page 0x70 */
};
#ifdef __KERNEL__
extern struct systemcfg *systemcfg;
#else
/* Processor Version Register (PVR) field extraction */
#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */
#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */
/* Processor Version Numbers */
#define PV_NORTHSTAR 0x0033
#define PV_PULSAR 0x0034
#define PV_POWER4 0x0035
#define PV_ICESTAR 0x0036
#define PV_SSTAR 0x0037
#define PV_POWER4p 0x0038
#define PV_630 0x0040
#define PV_630p 0x0041
/* Platforms supported by PPC64 */
#define PLATFORM_PSERIES 0x0100
#define PLATFORM_PSERIES_LPAR 0x0101
#define PLATFORM_ISERIES_LPAR 0x0201
static inline volatile struct systemcfg *systemcfg_init(void)
{
int fd = open("/proc/ppc64/systemcfg", O_RDONLY);
volatile struct systemcfg *ret;
if (fd == -1)
return 0;
ret = mmap(0, sizeof(struct systemcfg), PROT_READ, MAP_SHARED, fd, 0);
close(fd);
if (!ret)
return 0;
if (ret->version.major != SYSTEMCFG_MAJOR || ret->version.minor < SYSTEMCFG_MINOR) {
munmap((void *)ret, sizeof(struct systemcfg));
return 0;
}
return ret;
}
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#define SYSTEMCFG_PAGE 0x5
#define SYSTEMCFG_PHYS_ADDR (SYSTEMCFG_PAGE<<PAGE_SHIFT)
#define SYSTEMCFG_VIRT_ADDR (KERNELBASE+SYSTEMCFG_PHYS_ADDR)
#endif /* _SYSTEMCFG_H */
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