Commit 8c834a14 authored by Dafna Hirschfeld's avatar Dafna Hirschfeld Committed by Oded Gabbay

habanalabs: don't send addr and size to scrub_device_mem cb

We use scrub_device_mem only to scrub the entire SRAM and entire
DRAM. Therefore there is no need to send addr and size
args to the callback.
Signed-off-by: default avatarDafna Hirschfeld <dhirschfeld@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent c1048d14
......@@ -108,7 +108,7 @@ static void hl_ctx_fini(struct hl_ctx *ctx)
hl_encaps_sig_mgr_fini(hdev, &ctx->sig_mgr);
/* Scrub both SRAM and DRAM */
hdev->asic_funcs->scrub_device_mem(hdev, 0, 0);
hdev->asic_funcs->scrub_device_mem(hdev);
} else {
dev_dbg(hdev->dev, "closing kernel context\n");
hdev->asic_funcs->ctx_fini(ctx);
......
......@@ -1248,7 +1248,7 @@ struct fw_load_mgr {
* dma_free_coherent(). This is ASIC function because
* its implementation is not trivial when the driver
* is loaded in simulation mode (not upstreamed).
* @scrub_device_mem: Scrub device memory given an address and size
* @scrub_device_mem: Scrub the entire SRAM and DRAM.
* @scrub_device_dram: Scrub the dram memory of the device.
* @get_int_queue_base: get the internal queue base address.
* @test_queues: run simple test on all queues for sanity check.
......@@ -1359,7 +1359,7 @@ struct hl_asic_funcs {
dma_addr_t *dma_handle, gfp_t flag);
void (*asic_dma_free_coherent)(struct hl_device *hdev, size_t size,
void *cpu_addr, dma_addr_t dma_handle);
int (*scrub_device_mem)(struct hl_device *hdev, u64 addr, u64 size);
int (*scrub_device_mem)(struct hl_device *hdev);
int (*scrub_device_dram)(struct hl_device *hdev, u64 val);
void* (*get_int_queue_base)(struct hl_device *hdev, u32 queue_id,
dma_addr_t *dma_handle, u16 *queue_len);
......
......@@ -1657,7 +1657,7 @@ static int gaudi_late_init(struct hl_device *hdev)
}
/* Scrub both SRAM and DRAM */
rc = hdev->asic_funcs->scrub_device_mem(hdev, 0, 0);
rc = hdev->asic_funcs->scrub_device_mem(hdev);
if (rc)
goto disable_pci_access;
......@@ -4846,51 +4846,49 @@ static int gaudi_scrub_device_dram(struct hl_device *hdev, u64 val)
return 0;
}
static int gaudi_scrub_device_mem(struct hl_device *hdev, u64 addr, u64 size)
static int gaudi_scrub_device_mem(struct hl_device *hdev)
{
struct asic_fixed_properties *prop = &hdev->asic_prop;
u64 addr, size, dummy_val;
int rc = 0;
u64 val = 0;
if (!hdev->memory_scrub)
return 0;
if (!addr && !size) {
/* Wait till device is idle */
rc = hl_poll_timeout(
hdev,
mmDMA0_CORE_STS0/* dummy */,
val/* dummy */,
(hdev->asic_funcs->is_device_idle(hdev, NULL,
0, NULL)),
1000,
HBM_SCRUBBING_TIMEOUT_US);
if (rc) {
dev_err(hdev->dev, "waiting for idle timeout\n");
return -EIO;
}
/* Wait till device is idle */
rc = hl_poll_timeout(hdev,
mmDMA0_CORE_STS0 /* dummy */,
dummy_val /* dummy */,
(hdev->asic_funcs->is_device_idle(hdev, NULL, 0, NULL)),
1000,
HBM_SCRUBBING_TIMEOUT_US);
if (rc) {
dev_err(hdev->dev, "waiting for idle timeout\n");
return -EIO;
}
/* Scrub SRAM */
addr = prop->sram_user_base_address;
size = hdev->pldm ? 0x10000 :
(prop->sram_size - SRAM_USER_BASE_OFFSET);
val = 0x7777777777777777ull;
/* Scrub SRAM */
addr = prop->sram_user_base_address;
size = hdev->pldm ? 0x10000 : prop->sram_size - SRAM_USER_BASE_OFFSET;
val = 0x7777777777777777ull;
rc = gaudi_memset_device_memory(hdev, addr, size, val);
if (rc) {
dev_err(hdev->dev,
"Failed to clear SRAM in mem scrub all\n");
return rc;
}
dev_dbg(hdev->dev, "Scrubing SRAM: 0x%09llx - 0x%09llx val: 0x%llx\n",
addr, addr + size, val);
rc = gaudi_memset_device_memory(hdev, addr, size, val);
if (rc) {
dev_err(hdev->dev, "Failed to clear SRAM (%d)\n", rc);
return rc;
}
/* Scrub HBM using all DMA channels in parallel */
rc = gaudi_scrub_device_dram(hdev, 0xdeadbeaf);
if (rc)
dev_err(hdev->dev,
"Failed to clear HBM in mem scrub all\n");
/* Scrub HBM using all DMA channels in parallel */
rc = gaudi_scrub_device_dram(hdev, 0xdeadbeaf);
if (rc) {
dev_err(hdev->dev, "Failed to clear HBM (%d)\n", rc);
return rc;
}
return rc;
return 0;
}
static void *gaudi_get_int_queue_base(struct hl_device *hdev,
......
......@@ -3019,7 +3019,7 @@ static void goya_dma_free_coherent(struct hl_device *hdev, size_t size,
dma_free_coherent(&hdev->pdev->dev, size, cpu_addr, fixed_dma_handle);
}
int goya_scrub_device_mem(struct hl_device *hdev, u64 addr, u64 size)
int goya_scrub_device_mem(struct hl_device *hdev)
{
return 0;
}
......
......@@ -233,7 +233,7 @@ void goya_add_end_of_cb_packets(struct hl_device *hdev, void *kernel_address,
u32 len, u32 original_len, u64 cq_addr, u32 cq_val,
u32 msix_vec, bool eb);
int goya_cs_parser(struct hl_device *hdev, struct hl_cs_parser *parser);
int goya_scrub_device_mem(struct hl_device *hdev, u64 addr, u64 size);
int goya_scrub_device_mem(struct hl_device *hdev);
void *goya_get_int_queue_base(struct hl_device *hdev, u32 queue_id,
dma_addr_t *dma_handle, u16 *queue_len);
u32 goya_get_dma_desc_list_size(struct hl_device *hdev, struct sg_table *sgt);
......
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