Commit 8ccd66f2 authored by Diwakar Sharma's avatar Diwakar Sharma Committed by Ulf Hansson

mmc: core: sdio: Set SDIO clock of SDR104 to 150MHz for Marvell 8887 chip

This patch uses limit clock rate quirk to reduce clock rate
for "SDR104" mode on IMX side for Marvell 8887
WiFi + Bluetooth chip side, as Marvell does not recommend
to use SDIO at the speed of higher than 150MHz.
Signed-off-by: default avatarDiwakar Sharma <diwakar.sharma@in.bosch.com>
Signed-off-by: default avatarHarish Jenny K N <harish_kandiga@mentor.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent ebc5a1bf
......@@ -132,6 +132,9 @@ static const struct mmc_fixup sdio_fixup_methods[] = {
SDIO_FIXUP(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797_F0,
add_quirk, MMC_QUIRK_BROKEN_IRQ_POLLING),
SDIO_FIXUP(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887WLAN,
add_limit_rate_quirk, 150000000),
END_FIXUP
};
......
......@@ -55,6 +55,7 @@
#define SDIO_DEVICE_ID_MARVELL_8688WLAN 0x9104
#define SDIO_DEVICE_ID_MARVELL_8688BT 0x9105
#define SDIO_DEVICE_ID_MARVELL_8797_F0 0x9128
#define SDIO_DEVICE_ID_MARVELL_8887WLAN 0x9134
#define SDIO_VENDOR_ID_SIANO 0x039a
#define SDIO_DEVICE_ID_SIANO_NOVA_B0 0x0201
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment