Commit 8ceeb470 authored by Long Cheng's avatar Long Cheng Committed by Greg Kroah-Hartman

serial: 8250-mtk: add follow control

Add SW and HW follow control function.
Signed-off-by: default avatarLong Cheng <long.cheng@mediatek.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f1374017
...@@ -21,12 +21,14 @@ ...@@ -21,12 +21,14 @@
#include "8250.h" #include "8250.h"
#define UART_MTK_HIGHS 0x09 /* Highspeed register */ #define MTK_UART_HIGHS 0x09 /* Highspeed register */
#define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */ #define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */
#define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */ #define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */
#define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
#define MTK_UART_DMA_EN 0x13 /* DMA Enable register */ #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */
#define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */
#define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */
#define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */
#define MTK_UART_DMA_EN_TX 0x2 #define MTK_UART_DMA_EN_TX 0x2
#define MTK_UART_DMA_EN_RX 0x5 #define MTK_UART_DMA_EN_RX 0x5
...@@ -46,6 +48,7 @@ enum dma_rx_status { ...@@ -46,6 +48,7 @@ enum dma_rx_status {
struct mtk8250_data { struct mtk8250_data {
int line; int line;
unsigned int rx_pos; unsigned int rx_pos;
unsigned int clk_count;
struct clk *uart_clk; struct clk *uart_clk;
struct clk *bus_clk; struct clk *bus_clk;
struct uart_8250_dma *dma; struct uart_8250_dma *dma;
...@@ -196,9 +199,15 @@ static void ...@@ -196,9 +199,15 @@ static void
mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
struct ktermios *old) struct ktermios *old)
{ {
unsigned short fraction_L_mapping[] = {
0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
};
unsigned short fraction_M_mapping[] = {
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
};
struct uart_8250_port *up = up_to_u8250p(port); struct uart_8250_port *up = up_to_u8250p(port);
unsigned int baud, quot, fraction;
unsigned long flags; unsigned long flags;
unsigned int baud, quot;
#ifdef CONFIG_SERIAL_8250_DMA #ifdef CONFIG_SERIAL_8250_DMA
if (up->dma) { if (up->dma) {
...@@ -214,7 +223,7 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, ...@@ -214,7 +223,7 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
serial8250_do_set_termios(port, termios, old); serial8250_do_set_termios(port, termios, old);
/* /*
* Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS) * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
* *
* We need to recalcualte the quot register, as the claculation depends * We need to recalcualte the quot register, as the claculation depends
* on the vaule in the highspeed register. * on the vaule in the highspeed register.
...@@ -230,18 +239,11 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, ...@@ -230,18 +239,11 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
port->uartclk / 16 / UART_DIV_MAX, port->uartclk / 16 / UART_DIV_MAX,
port->uartclk); port->uartclk);
if (baud <= 115200) { if (baud < 115200) {
serial_port_out(port, UART_MTK_HIGHS, 0x0); serial_port_out(port, MTK_UART_HIGHS, 0x0);
quot = uart_get_divisor(port, baud); quot = uart_get_divisor(port, baud);
} else if (baud <= 576000) {
serial_port_out(port, UART_MTK_HIGHS, 0x2);
/* Set to next lower baudrate supported */
if ((baud == 500000) || (baud == 576000))
baud = 460800;
quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
} else { } else {
serial_port_out(port, UART_MTK_HIGHS, 0x3); serial_port_out(port, MTK_UART_HIGHS, 0x3);
quot = DIV_ROUND_UP(port->uartclk, 256 * baud); quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
} }
...@@ -258,17 +260,29 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, ...@@ -258,17 +260,29 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
/* reset DLAB */ /* reset DLAB */
serial_port_out(port, UART_LCR, up->lcr); serial_port_out(port, UART_LCR, up->lcr);
if (baud > 460800) { if (baud >= 115200) {
unsigned int tmp; unsigned int tmp;
tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud); tmp = (port->uartclk / (baud * quot)) - 1;
serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1); serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
serial_port_out(port, UART_MTK_SAMPLE_POINT, serial_port_out(port, MTK_UART_SAMPLE_POINT,
(tmp - 2) >> 1); (tmp >> 1) - 1);
/*count fraction to set fractoin register */
fraction = ((port->uartclk * 100) / baud / quot) % 100;
fraction = DIV_ROUND_CLOSEST(fraction, 10);
serial_port_out(port, MTK_UART_FRACDIV_L,
fraction_L_mapping[fraction]);
serial_port_out(port, MTK_UART_FRACDIV_M,
fraction_M_mapping[fraction]);
} else { } else {
serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00); serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff); serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
} }
if (uart_console(port))
up->port.cons->cflag = termios->c_cflag;
spin_unlock_irqrestore(&port->lock, flags); spin_unlock_irqrestore(&port->lock, flags);
/* Don't rewrite B0 */ /* Don't rewrite B0 */
......
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