Commit 8d89b96f authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: optimize the mclk dpm policy settings

Different mclk dpm policy will be applied based on the VRAM
width.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c24a3c05
......@@ -1585,9 +1585,19 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
data->current_profile_setting.sclk_down_hyst = 100;
data->current_profile_setting.sclk_activity = SMU7_SCLK_TARGETACTIVITY_DFLT;
data->current_profile_setting.bupdate_mclk = 1;
data->current_profile_setting.mclk_up_hyst = 0;
data->current_profile_setting.mclk_down_hyst = 100;
data->current_profile_setting.mclk_activity = SMU7_MCLK_TARGETACTIVITY_DFLT;
if (adev->gmc.vram_width == 256) {
data->current_profile_setting.mclk_up_hyst = 10;
data->current_profile_setting.mclk_down_hyst = 60;
data->current_profile_setting.mclk_activity = 25;
} else if (adev->gmc.vram_width == 128) {
data->current_profile_setting.mclk_up_hyst = 5;
data->current_profile_setting.mclk_down_hyst = 16;
data->current_profile_setting.mclk_activity = 20;
} else if (adev->gmc.vram_width == 64) {
data->current_profile_setting.mclk_up_hyst = 3;
data->current_profile_setting.mclk_down_hyst = 16;
data->current_profile_setting.mclk_activity = 20;
}
hwmgr->workload_mask = 1 << hwmgr->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D];
hwmgr->power_profile_mode = PP_SMC_POWER_PROFILE_FULLSCREEN3D;
hwmgr->default_power_profile_mode = PP_SMC_POWER_PROFILE_FULLSCREEN3D;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment