media: ov2680: Add support for 19.2 MHz clock
Most x86/ACPI boards use the ov2680 with a 19.2 MHz xvclk, rather then the expected 24MHz, add support for this. Compensate for the lower clk by setting a higher PLL multiplier of 69 when using 19.2 MHz vs the default multiplier of 55 for a 24MHz xvclk. Acked-by: Rui Miguel Silva <rmfrfs@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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