Commit 8ebb4697 authored by Jack Steiner's avatar Jack Steiner Committed by Tony Luck

[IA64-SGI] Add support for a future SGI chipset (shub2) 1of4

This patch changes the SN macros for calulating the addresses
of shub MMRs. Functionally, shub1 (current chipset) and shub2
are very similar. The primary differences are in the addresses
of MMRs and in the location of the NASID (node number) in
a physical address. This patch adds the basic infrastructure
for running a single binary kernel image on either shub1 or shub2.
Signed-off-by: default avatarJack Steiner <steiner@sgi.com>
parent f9286bcf
......@@ -340,7 +340,7 @@ void __init sn_setup(char **cmdline_p)
*
* One time setup for Node Data Area. Called by sn_setup().
*/
void __init sn_init_pdas(char **cmdline_p)
static void __init sn_init_pdas(char **cmdline_p)
{
cnodeid_t cnode;
......@@ -416,8 +416,17 @@ void __init sn_cpu_init(void)
int slice;
int cnode;
int i;
u64 shubtype, nasid_bitmask, nasid_shift;
static int wars_have_been_checked;
memset(pda, 0, sizeof(pda));
if (ia64_sn_get_hub_info(0, &shubtype, &nasid_bitmask, &nasid_shift))
BUG();
pda->shub2 = (u8)shubtype;
pda->nasid_bitmask = (u16)nasid_bitmask;
pda->nasid_shift = (u8)nasid_shift;
pda->as_shift = pda->nasid_shift - 2;
/*
* The boot cpu makes this call again after platform initialization is
* complete.
......@@ -441,7 +450,6 @@ void __init sn_cpu_init(void)
cnode = nasid_to_cnodeid(nasid);
memset(pda, 0, sizeof(pda));
pda->p_nodepda = nodepdaindr[cnode];
pda->led_address =
(typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
......@@ -475,10 +483,6 @@ void __init sn_cpu_init(void)
pda->pio_write_status_addr = (volatile unsigned long *)
LOCAL_MMR_ADDR((slice <
2 ? SH_PIO_WRITE_STATUS_0 : SH_PIO_WRITE_STATUS_1));
pda->mem_write_status_addr = (volatile u64 *)
LOCAL_MMR_ADDR((slice <
2 ? SH_MEMORY_WRITE_STATUS_0 :
SH_MEMORY_WRITE_STATUS_1));
if (local_node_data->active_cpu_count++ == 0) {
int buddy_nasid;
......
......@@ -26,12 +26,12 @@ static struct time_interpolator sn2_interpolator = {
.drift = -1,
.shift = 10,
.mask = (1LL << 55) - 1,
.source = TIME_SOURCE_MMIO64,
.addr = RTC_COUNTER_ADDR
.source = TIME_SOURCE_MMIO64
};
void __init sn_timer_init(void)
{
sn2_interpolator.frequency = sn_rtc_cycles_per_second;
sn2_interpolator.addr = RTC_COUNTER_ADDR;
register_time_interpolator(&sn2_interpolator);
}
This diff is collapsed.
......@@ -29,7 +29,7 @@ typedef struct kl_config_hdr {
} kl_config_hdr_t;
#define NODE_OFFSET_TO_LBOARD(nasid,off) (lboard_t*)(NODE_CAC_BASE(nasid) + (off))
#define NODE_OFFSET_TO_LBOARD(nasid,off) (lboard_t*)(GLOBAL_CAC_ADDR((nasid), (off)))
/*
* The KLCONFIG area is organized as a LINKED LIST of BOARDs. A BOARD
......
......@@ -37,17 +37,21 @@ typedef struct pda_s {
* Support for SN LEDs
*/
volatile short *led_address;
u16 nasid_bitmask;
u8 shub2;
u8 nasid_shift;
u8 as_shift;
u8 shub_1_1_found;
u8 led_state;
u8 hb_state; /* supports blinking heartbeat leds */
u8 shub_1_1_found;
unsigned int hb_count;
unsigned int idle_flag;
volatile unsigned long *bedrock_rev_id;
volatile unsigned long *pio_write_status_addr;
unsigned long pio_write_status_val;
volatile unsigned long *pio_shub_war_cam_addr;
volatile unsigned long *mem_write_status_addr;
struct bteinfo_s *cpu_bte_if[BTES_PER_NODE]; /* cpu interface order */
......@@ -76,7 +80,7 @@ typedef struct pda_s {
*/
DECLARE_PER_CPU(struct pda_s, pda_percpu);
#define pda (&__get_cpu_var(pda_percpu))
#define pda (&__ia64_per_cpu_var(pda_percpu))
#define pdacpu(cpu) (&per_cpu(pda_percpu, cpu))
......@@ -85,4 +89,7 @@ DECLARE_PER_CPU(struct pda_s, pda_percpu);
*/
#define enable_shub_wars_1_1() (pda->shub_1_1_found)
#define is_shub2() (pda->shub2)
#define is_shub1() (pda->shub2 == 0)
#endif /* _ASM_IA64_SN_PDA_H */
......@@ -32,9 +32,10 @@
#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
#define SN_SAL_PRINT_ERROR 0x02000012
#define SN_SAL_GET_SAPIC_INFO 0x02009999 //ZZZZ fix
#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
#define SN_SAL_GET_HUB_INFO 0x0200001c
#define SN_SAL_GET_SAPIC_INFO 0x0200001d
#define SN_SAL_CONSOLE_PUTC 0x02000021
#define SN_SAL_CONSOLE_GETC 0x02000022
#define SN_SAL_CONSOLE_PUTS 0x02000023
......@@ -847,6 +848,14 @@ ia64_sn_irtr_init(nasid_t nasid, void *buf, int len)
/*
* Returns the nasid, subnode & slice corresponding to a SAPIC ID
*
* In:
* arg0 - SN_SAL_GET_SAPIC_INFO
* arg1 - sapicid (lid >> 16)
* Out:
* v0 - nasid
* v1 - subnode
* v2 - slice
*/
static inline u64
ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
......@@ -859,7 +868,7 @@ ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
ret_stuff.v2 = 0;
SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0);
/***** BEGIN HACK - temp til new proms available ********/
/***** BEGIN HACK - temp til old proms no longer supported ********/
if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
if (nasid) *nasid = sapicid & 0xfff;
if (subnode) *subnode = (sapicid >> 13) & 1;
......@@ -876,6 +885,46 @@ ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
if (slice) *slice = (int) ret_stuff.v2;
return 0;
}
/*
* Returns information about the HUB/SHUB.
* In:
* arg0 - SN_SAL_GET_HUB_INFO
* arg1 - 0 (other values reserved for future use)
* Out:
* v0 - shub type (0=shub1, 1=shub2)
* v1 - masid mask (ex., 0x7ff for 11 bit nasid)
* v2 - bit position of low nasid bit
*/
static inline u64
ia64_sn_get_hub_info(int fc, u64 *arg1, u64 *arg2, u64 *arg3)
{
struct ia64_sal_retval ret_stuff;
ret_stuff.status = 0;
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_HUB_INFO, fc, 0, 0, 0, 0, 0, 0);
/***** BEGIN HACK - temp til old proms no longer supported ********/
if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
if (arg1) *arg1 = 0;
if (arg2) *arg2 = 0x7ff;
if (arg3) *arg3 = 38;
return 0;
}
/***** END HACK *******/
if (ret_stuff.status < 0)
return ret_stuff.status;
if (arg1) *arg1 = ret_stuff.v0;
if (arg2) *arg2 = ret_stuff.v1;
if (arg3) *arg3 = ret_stuff.v2;
return 0;
}
/*
* This is the access point to the Altix PROM hardware performance
* and status monitoring interface. For info on using this, see
......
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