Commit 8ed84150 authored by James Zhu's avatar James Zhu Committed by Alex Deucher

drm/amdgpu: add uvd enc command in header

Add UVD encode command interface definition for uvd6.3 HEVC encoding
Signed-off-by: default avatarJames Zhu <James.Zhu@amd.com>
Reviewed-and-Tested-by: default avatarLeo Liu <leo.liu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d0e62855
...@@ -465,6 +465,16 @@ ...@@ -465,6 +465,16 @@
#define VCE_CMD_UPDATE_PTB 0x00000107 #define VCE_CMD_UPDATE_PTB 0x00000107
#define VCE_CMD_FLUSH_TLB 0x00000108 #define VCE_CMD_FLUSH_TLB 0x00000108
/* HEVC ENC */
#define HEVC_ENC_CMD_NO_OP 0x00000000
#define HEVC_ENC_CMD_END 0x00000001
#define HEVC_ENC_CMD_FENCE 0x00000003
#define HEVC_ENC_CMD_TRAP 0x00000004
#define HEVC_ENC_CMD_IB_VM 0x00000102
#define HEVC_ENC_CMD_WAIT_GE 0x00000106
#define HEVC_ENC_CMD_UPDATE_PTB 0x00000107
#define HEVC_ENC_CMD_FLUSH_TLB 0x00000108
/* mmPA_SC_RASTER_CONFIG mask */ /* mmPA_SC_RASTER_CONFIG mask */
#define RB_MAP_PKR0(x) ((x) << 0) #define RB_MAP_PKR0(x) ((x) << 0)
#define RB_MAP_PKR0_MASK (0x3 << 0) #define RB_MAP_PKR0_MASK (0x3 << 0)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment