Commit 8f0fece6 authored by Alex Elder's avatar Alex Elder Committed by David S. Miller

net: ipa: introduce GSI register IDs

Create a new gsi_reg_id enumerated type, which identifies each GSI
register with a symbolic identifier.

Create a function that indicates whether a register ID is valid.
Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3c506add
......@@ -22,6 +22,69 @@
*/
#define GSI_EE_REG_ADJUST 0x0000d000 /* IPA v4.5+ */
/* Is this register ID valid for the current GSI version? */
static bool gsi_reg_id_valid(struct gsi *gsi, enum gsi_reg_id reg_id)
{
switch (reg_id) {
case INTER_EE_SRC_CH_IRQ_MSK:
case INTER_EE_SRC_EV_CH_IRQ_MSK:
case CH_C_CNTXT_0:
case CH_C_CNTXT_1:
case CH_C_CNTXT_2:
case CH_C_CNTXT_3:
case CH_C_QOS:
case CH_C_SCRATCH_0:
case CH_C_SCRATCH_1:
case CH_C_SCRATCH_2:
case CH_C_SCRATCH_3:
case EV_CH_E_CNTXT_0:
case EV_CH_E_CNTXT_1:
case EV_CH_E_CNTXT_2:
case EV_CH_E_CNTXT_3:
case EV_CH_E_CNTXT_4:
case EV_CH_E_CNTXT_8:
case EV_CH_E_CNTXT_9:
case EV_CH_E_CNTXT_10:
case EV_CH_E_CNTXT_11:
case EV_CH_E_CNTXT_12:
case EV_CH_E_CNTXT_13:
case EV_CH_E_SCRATCH_0:
case EV_CH_E_SCRATCH_1:
case CH_C_DOORBELL_0:
case EV_CH_E_DOORBELL_0:
case GSI_STATUS:
case CH_CMD:
case EV_CH_CMD:
case GENERIC_CMD:
case HW_PARAM_2:
case CNTXT_TYPE_IRQ:
case CNTXT_TYPE_IRQ_MSK:
case CNTXT_SRC_CH_IRQ:
case CNTXT_SRC_CH_IRQ_MSK:
case CNTXT_SRC_CH_IRQ_CLR:
case CNTXT_SRC_EV_CH_IRQ:
case CNTXT_SRC_EV_CH_IRQ_MSK:
case CNTXT_SRC_EV_CH_IRQ_CLR:
case CNTXT_SRC_IEOB_IRQ:
case CNTXT_SRC_IEOB_IRQ_MSK:
case CNTXT_SRC_IEOB_IRQ_CLR:
case CNTXT_GLOB_IRQ_STTS:
case CNTXT_GLOB_IRQ_EN:
case CNTXT_GLOB_IRQ_CLR:
case CNTXT_GSI_IRQ_STTS:
case CNTXT_GSI_IRQ_EN:
case CNTXT_GSI_IRQ_CLR:
case CNTXT_INTSET:
case ERROR_LOG:
case ERROR_LOG_CLR:
case CNTXT_SCRATCH_0:
return true;
default:
return false;
}
}
/* Sets gsi->virt_raw and gsi->virt, and I/O maps the "gsi" memory range */
int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev)
{
......@@ -30,6 +93,8 @@ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev)
resource_size_t size;
u32 adjust;
(void)gsi_reg_id_valid; /* Avoid a warning */
/* Get GSI memory range and map it */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gsi");
if (!res) {
......
......@@ -38,6 +38,63 @@
* (though the actual limit is hardware-dependent).
*/
/* enum gsi_reg_id - GSI register IDs */
enum gsi_reg_id {
INTER_EE_SRC_CH_IRQ_MSK, /* IPA v3.5+ */
INTER_EE_SRC_EV_CH_IRQ_MSK, /* IPA v3.5+ */
CH_C_CNTXT_0,
CH_C_CNTXT_1,
CH_C_CNTXT_2,
CH_C_CNTXT_3,
CH_C_QOS,
CH_C_SCRATCH_0,
CH_C_SCRATCH_1,
CH_C_SCRATCH_2,
CH_C_SCRATCH_3,
EV_CH_E_CNTXT_0,
EV_CH_E_CNTXT_1,
EV_CH_E_CNTXT_2,
EV_CH_E_CNTXT_3,
EV_CH_E_CNTXT_4,
EV_CH_E_CNTXT_8,
EV_CH_E_CNTXT_9,
EV_CH_E_CNTXT_10,
EV_CH_E_CNTXT_11,
EV_CH_E_CNTXT_12,
EV_CH_E_CNTXT_13,
EV_CH_E_SCRATCH_0,
EV_CH_E_SCRATCH_1,
CH_C_DOORBELL_0,
EV_CH_E_DOORBELL_0,
GSI_STATUS,
CH_CMD,
EV_CH_CMD,
GENERIC_CMD,
HW_PARAM_2, /* IPA v3.5.1+ */
CNTXT_TYPE_IRQ,
CNTXT_TYPE_IRQ_MSK,
CNTXT_SRC_CH_IRQ,
CNTXT_SRC_CH_IRQ_MSK,
CNTXT_SRC_CH_IRQ_CLR,
CNTXT_SRC_EV_CH_IRQ,
CNTXT_SRC_EV_CH_IRQ_MSK,
CNTXT_SRC_EV_CH_IRQ_CLR,
CNTXT_SRC_IEOB_IRQ,
CNTXT_SRC_IEOB_IRQ_MSK,
CNTXT_SRC_IEOB_IRQ_CLR,
CNTXT_GLOB_IRQ_STTS,
CNTXT_GLOB_IRQ_EN,
CNTXT_GLOB_IRQ_CLR,
CNTXT_GSI_IRQ_STTS,
CNTXT_GSI_IRQ_EN,
CNTXT_GSI_IRQ_CLR,
CNTXT_INTSET,
ERROR_LOG,
ERROR_LOG_CLR,
CNTXT_SCRATCH_0,
GSI_REG_ID_COUNT, /* Last; not an ID */
};
/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */
#define GSI_INTER_EE_SRC_CH_IRQ_MSK_OFFSET \
......
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