gpio: 74x164: Use a single SPI transfer instead of multiple transfers
Currently the 74x164 driver assembles an SPI message from an array of one-byte SPI transfers, one for each daisy-chained shift register, as the first byte sent will end up in the last register. This array is allocated and deallocated on each GPIO write access. By storing the data in the internal buffer in reverse order, we can use a single SPI transfer with the internal buffer directly, simplifying the code a lot, and avoiding memory (de)allocations. This also avoids transient values on the GPIO outputs when using an SPI master that cannot keep the hardware chip select asserted in between multiple transfers (and would need cs-gpios for proper operation). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Mark Brown <broonie@kernel.org> [Rebased changing .dev to .parent] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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