Commit 904f309a authored by Srinivas Pandruvada's avatar Srinivas Pandruvada Committed by Rafael J. Wysocki

thermal: intel: Don't set HFI status bit to 1

When CPU doesn't support HFI (Hardware Feedback Interface), don't include
BIT 26 in the mask to prevent clearing. otherwise this results in:
    unchecked MSR access error: WRMSR to 0x1b1
      (tried to write 0x0000000004000aa8)
      at rIP: 0xffffffff8b8559fe (throttle_active_work+0xbe/0x1b0)

Fixes: 6fe1e64b ("thermal: intel: Prevent accidental clearing of HFI status")
Reported-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
Tested-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: default avatarSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 75b15aa0
...@@ -194,7 +194,7 @@ static const struct attribute_group thermal_attr_group = { ...@@ -194,7 +194,7 @@ static const struct attribute_group thermal_attr_group = {
#define THERM_STATUS_PROCHOT_LOG BIT(1) #define THERM_STATUS_PROCHOT_LOG BIT(1)
#define THERM_STATUS_CLEAR_CORE_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(13) | BIT(15)) #define THERM_STATUS_CLEAR_CORE_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(13) | BIT(15))
#define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(26)) #define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11))
/* /*
* Clear the bits in package thermal status register for bit = 1 * Clear the bits in package thermal status register for bit = 1
...@@ -211,6 +211,9 @@ void thermal_clear_package_intr_status(int level, u64 bit_mask) ...@@ -211,6 +211,9 @@ void thermal_clear_package_intr_status(int level, u64 bit_mask)
} else { } else {
msr = MSR_IA32_PACKAGE_THERM_STATUS; msr = MSR_IA32_PACKAGE_THERM_STATUS;
msr_val = THERM_STATUS_CLEAR_PKG_MASK; msr_val = THERM_STATUS_CLEAR_PKG_MASK;
if (boot_cpu_has(X86_FEATURE_HFI))
msr_val |= BIT(26);
} }
msr_val &= ~bit_mask; msr_val &= ~bit_mask;
......
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