Commit 91dd3114 authored by Linus Walleij's avatar Linus Walleij

Merge tag 'intel-pinctrl-v6.2-1' of...

Merge tag 'intel-pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.2-1

* Add Intel Moorefield pin control driver
* Deduplicate COMMUNITY() macro in the Intel pin control drivers
* Switch Freescale GPIO driver to use fwnode instead of of_node
* Miscellaneous clenups here and there

The following is an automated git shortlog grouped by driver:

alderlake:
 -  Deduplicate COMMUNITY macro code

cannonlake:
 -  Deduplicate COMMUNITY macro code

device property:
 -  Introduce fwnode_device_is_compatible() helper

icelake:
 -  Deduplicate COMMUNITY macro code

intel:
 -  Add Intel Moorefield pin controller support
 -  Use temporary variable for struct device
 -  Use str_enable_disable() helper

merrifield:
 -  Use temporary variable for struct device

qcom:
 -  lpass-lpi: Add missed bitfield.h

soc:
 -  fsl: qe: Switch to use fwnode instead of of_node

sunrisepoint:
 -  Deduplicate COMMUNITY macro code

tigerlake:
 -  Deduplicate COMMUNITY macro code
parents 196270c5 b14ef613
...@@ -47,6 +47,17 @@ config PINCTRL_MERRIFIELD ...@@ -47,6 +47,17 @@ config PINCTRL_MERRIFIELD
interface that allows configuring of SoC pins and using them as interface that allows configuring of SoC pins and using them as
GPIOs. GPIOs.
config PINCTRL_MOOREFIELD
tristate "Intel Moorefield pinctrl driver"
depends on X86_INTEL_MID
select PINMUX
select PINCONF
select GENERIC_PINCONF
help
Moorefield Family-Level Interface Shim (FLIS) driver provides an
interface that allows configuring of SoC pins and using them as
GPIOs.
config PINCTRL_INTEL config PINCTRL_INTEL
tristate tristate
select PINMUX select PINMUX
......
...@@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o ...@@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
obj-$(CONFIG_PINCTRL_CHERRYVIEW) += pinctrl-cherryview.o obj-$(CONFIG_PINCTRL_CHERRYVIEW) += pinctrl-cherryview.o
obj-$(CONFIG_PINCTRL_LYNXPOINT) += pinctrl-lynxpoint.o obj-$(CONFIG_PINCTRL_LYNXPOINT) += pinctrl-lynxpoint.o
obj-$(CONFIG_PINCTRL_MERRIFIELD) += pinctrl-merrifield.o obj-$(CONFIG_PINCTRL_MERRIFIELD) += pinctrl-merrifield.o
obj-$(CONFIG_PINCTRL_MOOREFIELD) += pinctrl-moorefield.o
obj-$(CONFIG_PINCTRL_INTEL) += pinctrl-intel.o obj-$(CONFIG_PINCTRL_INTEL) += pinctrl-intel.o
obj-$(CONFIG_PINCTRL_ALDERLAKE) += pinctrl-alderlake.o obj-$(CONFIG_PINCTRL_ALDERLAKE) += pinctrl-alderlake.o
obj-$(CONFIG_PINCTRL_BROXTON) += pinctrl-broxton.o obj-$(CONFIG_PINCTRL_BROXTON) += pinctrl-broxton.o
......
...@@ -34,33 +34,25 @@ ...@@ -34,33 +34,25 @@
.gpio_base = (g), \ .gpio_base = (g), \
} }
#define ADL_N_COMMUNITY(b, s, e, g) \ #define ADL_COMMUNITY(b, s, e, g, v) \
{ \ { \
.barno = (b), \ .barno = (b), \
.padown_offset = ADL_N_PAD_OWN, \ .padown_offset = ADL_##v##_PAD_OWN, \
.padcfglock_offset = ADL_N_PADCFGLOCK, \ .padcfglock_offset = ADL_##v##_PADCFGLOCK, \
.hostown_offset = ADL_N_HOSTSW_OWN, \ .hostown_offset = ADL_##v##_HOSTSW_OWN, \
.is_offset = ADL_N_GPI_IS, \ .is_offset = ADL_##v##_GPI_IS, \
.ie_offset = ADL_N_GPI_IE, \ .ie_offset = ADL_##v##_GPI_IE, \
.pin_base = (s), \ .pin_base = (s), \
.npins = ((e) - (s) + 1), \ .npins = ((e) - (s) + 1), \
.gpps = (g), \ .gpps = (g), \
.ngpps = ARRAY_SIZE(g), \ .ngpps = ARRAY_SIZE(g), \
} }
#define ADL_N_COMMUNITY(b, s, e, g) \
ADL_COMMUNITY(b, s, e, g, N)
#define ADL_S_COMMUNITY(b, s, e, g) \ #define ADL_S_COMMUNITY(b, s, e, g) \
{ \ ADL_COMMUNITY(b, s, e, g, S)
.barno = (b), \
.padown_offset = ADL_S_PAD_OWN, \
.padcfglock_offset = ADL_S_PADCFGLOCK, \
.hostown_offset = ADL_S_HOSTSW_OWN, \
.is_offset = ADL_S_GPI_IS, \
.ie_offset = ADL_S_GPI_IE, \
.pin_base = (s), \
.npins = ((e) - (s) + 1), \
.gpps = (g), \
.ngpps = ARRAY_SIZE(g), \
}
/* Alder Lake-N */ /* Alder Lake-N */
static const struct pinctrl_pin_desc adln_pins[] = { static const struct pinctrl_pin_desc adln_pins[] = {
......
...@@ -30,12 +30,12 @@ ...@@ -30,12 +30,12 @@
.gpio_base = (g), \ .gpio_base = (g), \
} }
#define CNL_COMMUNITY(b, s, e, ho, g) \ #define CNL_COMMUNITY(b, s, e, g, v) \
{ \ { \
.barno = (b), \ .barno = (b), \
.padown_offset = CNL_PAD_OWN, \ .padown_offset = CNL_PAD_OWN, \
.padcfglock_offset = CNL_PADCFGLOCK, \ .padcfglock_offset = CNL_PADCFGLOCK, \
.hostown_offset = (ho), \ .hostown_offset = CNL_##v##_HOSTSW_OWN, \
.is_offset = CNL_GPI_IS, \ .is_offset = CNL_GPI_IS, \
.ie_offset = CNL_GPI_IE, \ .ie_offset = CNL_GPI_IE, \
.pin_base = (s), \ .pin_base = (s), \
...@@ -45,10 +45,10 @@ ...@@ -45,10 +45,10 @@
} }
#define CNL_LP_COMMUNITY(b, s, e, g) \ #define CNL_LP_COMMUNITY(b, s, e, g) \
CNL_COMMUNITY(b, s, e, CNL_LP_HOSTSW_OWN, g) CNL_COMMUNITY(b, s, e, g, LP)
#define CNL_H_COMMUNITY(b, s, e, g) \ #define CNL_H_COMMUNITY(b, s, e, g) \
CNL_COMMUNITY(b, s, e, CNL_H_HOSTSW_OWN, g) CNL_COMMUNITY(b, s, e, g, H)
/* Cannon Lake-H */ /* Cannon Lake-H */
static const struct pinctrl_pin_desc cnlh_pins[] = { static const struct pinctrl_pin_desc cnlh_pins[] = {
......
...@@ -30,14 +30,14 @@ ...@@ -30,14 +30,14 @@
.gpio_base = (g), \ .gpio_base = (g), \
} }
#define ICL_COMMUNITY(b, s, e, ie, g) \ #define ICL_COMMUNITY(b, s, e, g, v) \
{ \ { \
.barno = (b), \ .barno = (b), \
.padown_offset = ICL_PAD_OWN, \ .padown_offset = ICL_PAD_OWN, \
.padcfglock_offset = ICL_PADCFGLOCK, \ .padcfglock_offset = ICL_PADCFGLOCK, \
.hostown_offset = ICL_HOSTSW_OWN, \ .hostown_offset = ICL_HOSTSW_OWN, \
.is_offset = ICL_GPI_IS, \ .is_offset = ICL_GPI_IS, \
.ie_offset = (ie), \ .ie_offset = ICL_##v##_GPI_IE, \
.pin_base = (s), \ .pin_base = (s), \
.npins = ((e) - (s) + 1), \ .npins = ((e) - (s) + 1), \
.gpps = (g), \ .gpps = (g), \
...@@ -45,10 +45,10 @@ ...@@ -45,10 +45,10 @@
} }
#define ICL_LP_COMMUNITY(b, s, e, g) \ #define ICL_LP_COMMUNITY(b, s, e, g) \
ICL_COMMUNITY(b, s, e, ICL_LP_GPI_IE, g) ICL_COMMUNITY(b, s, e, g, LP)
#define ICL_N_COMMUNITY(b, s, e, g) \ #define ICL_N_COMMUNITY(b, s, e, g) \
ICL_COMMUNITY(b, s, e, ICL_N_GPI_IE, g) ICL_COMMUNITY(b, s, e, g, N)
/* Ice Lake-LP */ /* Ice Lake-LP */
static const struct pinctrl_pin_desc icllp_pins[] = { static const struct pinctrl_pin_desc icllp_pins[] = {
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/property.h> #include <linux/property.h>
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include <linux/string_helpers.h>
#include <linux/time.h> #include <linux/time.h>
#include <linux/pinctrl/consumer.h> #include <linux/pinctrl/consumer.h>
...@@ -1167,7 +1168,7 @@ static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on) ...@@ -1167,7 +1168,7 @@ static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on)
else else
disable_irq_wake(pctrl->irq); disable_irq_wake(pctrl->irq);
dev_dbg(pctrl->dev, "%sable wake for pin %u\n", on ? "en" : "dis", pin); dev_dbg(pctrl->dev, "%s wake for pin %u\n", str_enable_disable(on), pin);
return 0; return 0;
} }
...@@ -1504,14 +1505,15 @@ static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl) ...@@ -1504,14 +1505,15 @@ static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
static int intel_pinctrl_probe(struct platform_device *pdev, static int intel_pinctrl_probe(struct platform_device *pdev,
const struct intel_pinctrl_soc_data *soc_data) const struct intel_pinctrl_soc_data *soc_data)
{ {
struct device *dev = &pdev->dev;
struct intel_pinctrl *pctrl; struct intel_pinctrl *pctrl;
int i, ret, irq; int i, ret, irq;
pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL);
if (!pctrl) if (!pctrl)
return -ENOMEM; return -ENOMEM;
pctrl->dev = &pdev->dev; pctrl->dev = dev;
pctrl->soc = soc_data; pctrl->soc = soc_data;
raw_spin_lock_init(&pctrl->lock); raw_spin_lock_init(&pctrl->lock);
...@@ -1520,8 +1522,8 @@ static int intel_pinctrl_probe(struct platform_device *pdev, ...@@ -1520,8 +1522,8 @@ static int intel_pinctrl_probe(struct platform_device *pdev,
* to the registers. * to the registers.
*/ */
pctrl->ncommunities = pctrl->soc->ncommunities; pctrl->ncommunities = pctrl->soc->ncommunities;
pctrl->communities = devm_kcalloc(&pdev->dev, pctrl->ncommunities, pctrl->communities = devm_kcalloc(dev, pctrl->ncommunities,
sizeof(*pctrl->communities), GFP_KERNEL); sizeof(*pctrl->communities), GFP_KERNEL);
if (!pctrl->communities) if (!pctrl->communities)
return -ENOMEM; return -ENOMEM;
...@@ -1572,7 +1574,7 @@ static int intel_pinctrl_probe(struct platform_device *pdev, ...@@ -1572,7 +1574,7 @@ static int intel_pinctrl_probe(struct platform_device *pdev,
offset = (value & CAPLIST_NEXT_MASK) >> CAPLIST_NEXT_SHIFT; offset = (value & CAPLIST_NEXT_MASK) >> CAPLIST_NEXT_SHIFT;
} while (offset); } while (offset);
dev_dbg(&pdev->dev, "Community%d features: %#08x\n", i, community->features); dev_dbg(dev, "Community%d features: %#08x\n", i, community->features);
/* Read offset of the pad configuration registers */ /* Read offset of the pad configuration registers */
offset = readl(regs + PADBAR); offset = readl(regs + PADBAR);
...@@ -1597,14 +1599,13 @@ static int intel_pinctrl_probe(struct platform_device *pdev, ...@@ -1597,14 +1599,13 @@ static int intel_pinctrl_probe(struct platform_device *pdev,
return ret; return ret;
pctrl->pctldesc = intel_pinctrl_desc; pctrl->pctldesc = intel_pinctrl_desc;
pctrl->pctldesc.name = dev_name(&pdev->dev); pctrl->pctldesc.name = dev_name(dev);
pctrl->pctldesc.pins = pctrl->soc->pins; pctrl->pctldesc.pins = pctrl->soc->pins;
pctrl->pctldesc.npins = pctrl->soc->npins; pctrl->pctldesc.npins = pctrl->soc->npins;
pctrl->pctldev = devm_pinctrl_register(&pdev->dev, &pctrl->pctldesc, pctrl->pctldev = devm_pinctrl_register(dev, &pctrl->pctldesc, pctrl);
pctrl);
if (IS_ERR(pctrl->pctldev)) { if (IS_ERR(pctrl->pctldev)) {
dev_err(&pdev->dev, "failed to register pinctrl driver\n"); dev_err(dev, "failed to register pinctrl driver\n");
return PTR_ERR(pctrl->pctldev); return PTR_ERR(pctrl->pctldev);
} }
...@@ -1645,10 +1646,11 @@ const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_ ...@@ -1645,10 +1646,11 @@ const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_
{ {
const struct intel_pinctrl_soc_data * const *table; const struct intel_pinctrl_soc_data * const *table;
const struct intel_pinctrl_soc_data *data = NULL; const struct intel_pinctrl_soc_data *data = NULL;
struct device *dev = &pdev->dev;
table = device_get_match_data(&pdev->dev); table = device_get_match_data(dev);
if (table) { if (table) {
struct acpi_device *adev = ACPI_COMPANION(&pdev->dev); struct acpi_device *adev = ACPI_COMPANION(dev);
unsigned int i; unsigned int i;
for (i = 0; table[i]; i++) { for (i = 0; table[i]; i++) {
......
...@@ -897,17 +897,18 @@ static const struct pinctrl_desc mrfld_pinctrl_desc = { ...@@ -897,17 +897,18 @@ static const struct pinctrl_desc mrfld_pinctrl_desc = {
static int mrfld_pinctrl_probe(struct platform_device *pdev) static int mrfld_pinctrl_probe(struct platform_device *pdev)
{ {
struct device *dev = &pdev->dev;
struct mrfld_family *families; struct mrfld_family *families;
struct mrfld_pinctrl *mp; struct mrfld_pinctrl *mp;
void __iomem *regs; void __iomem *regs;
size_t nfamilies; size_t nfamilies;
unsigned int i; unsigned int i;
mp = devm_kzalloc(&pdev->dev, sizeof(*mp), GFP_KERNEL); mp = devm_kzalloc(dev, sizeof(*mp), GFP_KERNEL);
if (!mp) if (!mp)
return -ENOMEM; return -ENOMEM;
mp->dev = &pdev->dev; mp->dev = dev;
raw_spin_lock_init(&mp->lock); raw_spin_lock_init(&mp->lock);
regs = devm_platform_ioremap_resource(pdev, 0); regs = devm_platform_ioremap_resource(pdev, 0);
...@@ -919,9 +920,7 @@ static int mrfld_pinctrl_probe(struct platform_device *pdev) ...@@ -919,9 +920,7 @@ static int mrfld_pinctrl_probe(struct platform_device *pdev)
* to the registers. * to the registers.
*/ */
nfamilies = ARRAY_SIZE(mrfld_families), nfamilies = ARRAY_SIZE(mrfld_families),
families = devm_kmemdup(&pdev->dev, mrfld_families, families = devm_kmemdup(dev, mrfld_families, sizeof(mrfld_families), GFP_KERNEL);
sizeof(mrfld_families),
GFP_KERNEL);
if (!families) if (!families)
return -ENOMEM; return -ENOMEM;
...@@ -939,13 +938,13 @@ static int mrfld_pinctrl_probe(struct platform_device *pdev) ...@@ -939,13 +938,13 @@ static int mrfld_pinctrl_probe(struct platform_device *pdev)
mp->groups = mrfld_groups; mp->groups = mrfld_groups;
mp->ngroups = ARRAY_SIZE(mrfld_groups); mp->ngroups = ARRAY_SIZE(mrfld_groups);
mp->pctldesc = mrfld_pinctrl_desc; mp->pctldesc = mrfld_pinctrl_desc;
mp->pctldesc.name = dev_name(&pdev->dev); mp->pctldesc.name = dev_name(dev);
mp->pctldesc.pins = mrfld_pins; mp->pctldesc.pins = mrfld_pins;
mp->pctldesc.npins = ARRAY_SIZE(mrfld_pins); mp->pctldesc.npins = ARRAY_SIZE(mrfld_pins);
mp->pctldev = devm_pinctrl_register(&pdev->dev, &mp->pctldesc, mp); mp->pctldev = devm_pinctrl_register(dev, &mp->pctldesc, mp);
if (IS_ERR(mp->pctldev)) { if (IS_ERR(mp->pctldev)) {
dev_err(&pdev->dev, "failed to register pinctrl driver\n"); dev_err(dev, "failed to register pinctrl driver\n");
return PTR_ERR(mp->pctldev); return PTR_ERR(mp->pctldev);
} }
......
This diff is collapsed.
...@@ -22,24 +22,24 @@ ...@@ -22,24 +22,24 @@
#define SPT_GPI_IS 0x100 #define SPT_GPI_IS 0x100
#define SPT_GPI_IE 0x120 #define SPT_GPI_IE 0x120
#define SPT_COMMUNITY(b, s, e, pl, gs, gn, g, n) \ #define SPT_COMMUNITY(b, s, e, g, n, v, gs, gn) \
{ \ { \
.barno = (b), \ .barno = (b), \
.padown_offset = SPT_PAD_OWN, \ .padown_offset = SPT_PAD_OWN, \
.padcfglock_offset = (pl), \ .padcfglock_offset = SPT_##v##_PADCFGLOCK, \
.hostown_offset = SPT_HOSTSW_OWN, \ .hostown_offset = SPT_HOSTSW_OWN, \
.is_offset = SPT_GPI_IS, \ .is_offset = SPT_GPI_IS, \
.ie_offset = SPT_GPI_IE, \ .ie_offset = SPT_GPI_IE, \
.gpp_size = (gs), \ .gpp_size = (gs), \
.gpp_num_padown_regs = (gn), \ .gpp_num_padown_regs = (gn), \
.pin_base = (s), \ .pin_base = (s), \
.npins = ((e) - (s) + 1), \ .npins = ((e) - (s) + 1), \
.gpps = (g), \ .gpps = (g), \
.ngpps = (n), \ .ngpps = (n), \
} }
#define SPT_LP_COMMUNITY(b, s, e) \ #define SPT_LP_COMMUNITY(b, s, e) \
SPT_COMMUNITY(b, s, e, SPT_LP_PADCFGLOCK, 24, 4, NULL, 0) SPT_COMMUNITY(b, s, e, NULL, 0, LP, 24, 4)
#define SPT_H_GPP(r, s, e, g) \ #define SPT_H_GPP(r, s, e, g) \
{ \ { \
...@@ -50,7 +50,7 @@ ...@@ -50,7 +50,7 @@
} }
#define SPT_H_COMMUNITY(b, s, e, g) \ #define SPT_H_COMMUNITY(b, s, e, g) \
SPT_COMMUNITY(b, s, e, SPT_H_PADCFGLOCK, 0, 0, g, ARRAY_SIZE(g)) SPT_COMMUNITY(b, s, e, g, ARRAY_SIZE(g), H, 0, 0)
/* Sunrisepoint-LP */ /* Sunrisepoint-LP */
static const struct pinctrl_pin_desc sptlp_pins[] = { static const struct pinctrl_pin_desc sptlp_pins[] = {
......
...@@ -31,25 +31,25 @@ ...@@ -31,25 +31,25 @@
.gpio_base = (g), \ .gpio_base = (g), \
} }
#define TGL_COMMUNITY(b, s, e, pl, ho, g) \ #define TGL_COMMUNITY(b, s, e, g, v) \
{ \ { \
.barno = (b), \ .barno = (b), \
.padown_offset = TGL_PAD_OWN, \ .padown_offset = TGL_PAD_OWN, \
.padcfglock_offset = (pl), \ .padcfglock_offset = TGL_##v##_PADCFGLOCK, \
.hostown_offset = (ho), \ .hostown_offset = TGL_##v##_HOSTSW_OWN, \
.is_offset = TGL_GPI_IS, \ .is_offset = TGL_GPI_IS, \
.ie_offset = TGL_GPI_IE, \ .ie_offset = TGL_GPI_IE, \
.pin_base = (s), \ .pin_base = (s), \
.npins = ((e) - (s) + 1), \ .npins = ((e) - (s) + 1), \
.gpps = (g), \ .gpps = (g), \
.ngpps = ARRAY_SIZE(g), \ .ngpps = ARRAY_SIZE(g), \
} }
#define TGL_LP_COMMUNITY(b, s, e, g) \ #define TGL_LP_COMMUNITY(b, s, e, g) \
TGL_COMMUNITY(b, s, e, TGL_LP_PADCFGLOCK, TGL_LP_HOSTSW_OWN, g) TGL_COMMUNITY(b, s, e, g, LP)
#define TGL_H_COMMUNITY(b, s, e, g) \ #define TGL_H_COMMUNITY(b, s, e, g) \
TGL_COMMUNITY(b, s, e, TGL_H_PADCFGLOCK, TGL_H_HOSTSW_OWN, g) TGL_COMMUNITY(b, s, e, g, H)
/* Tiger Lake-LP */ /* Tiger Lake-LP */
static const struct pinctrl_pin_desc tgllp_pins[] = { static const struct pinctrl_pin_desc tgllp_pins[] = {
......
...@@ -4,6 +4,7 @@ ...@@ -4,6 +4,7 @@
* Copyright (c) 2020 Linaro Ltd. * Copyright (c) 2020 Linaro Ltd.
*/ */
#include <linux/bitfield.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/gpio/driver.h> #include <linux/gpio/driver.h>
#include <linux/module.h> #include <linux/module.h>
......
...@@ -19,6 +19,8 @@ ...@@ -19,6 +19,8 @@
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/export.h> #include <linux/export.h>
#include <linux/property.h>
#include <soc/fsl/qe/qe.h> #include <soc/fsl/qe/qe.h>
struct qe_gpio_chip { struct qe_gpio_chip {
...@@ -179,7 +181,7 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index) ...@@ -179,7 +181,7 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index)
goto err0; goto err0;
} }
if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) { if (!fwnode_device_is_compatible(gc->fwnode, "fsl,mpc8323-qe-pario-bank")) {
pr_debug("%s: tried to get a non-qe pin\n", __func__); pr_debug("%s: tried to get a non-qe pin\n", __func__);
err = -EINVAL; err = -EINVAL;
goto err0; goto err0;
......
...@@ -50,7 +50,6 @@ int device_property_read_string(struct device *dev, const char *propname, ...@@ -50,7 +50,6 @@ int device_property_read_string(struct device *dev, const char *propname,
int device_property_match_string(struct device *dev, int device_property_match_string(struct device *dev,
const char *propname, const char *string); const char *propname, const char *string);
bool fwnode_device_is_available(const struct fwnode_handle *fwnode);
bool fwnode_property_present(const struct fwnode_handle *fwnode, bool fwnode_property_present(const struct fwnode_handle *fwnode,
const char *propname); const char *propname);
int fwnode_property_read_u8_array(const struct fwnode_handle *fwnode, int fwnode_property_read_u8_array(const struct fwnode_handle *fwnode,
...@@ -72,6 +71,15 @@ int fwnode_property_read_string(const struct fwnode_handle *fwnode, ...@@ -72,6 +71,15 @@ int fwnode_property_read_string(const struct fwnode_handle *fwnode,
const char *propname, const char **val); const char *propname, const char **val);
int fwnode_property_match_string(const struct fwnode_handle *fwnode, int fwnode_property_match_string(const struct fwnode_handle *fwnode,
const char *propname, const char *string); const char *propname, const char *string);
bool fwnode_device_is_available(const struct fwnode_handle *fwnode);
static inline
bool fwnode_device_is_compatible(const struct fwnode_handle *fwnode, const char *compat)
{
return fwnode_property_match_string(fwnode, "compatible", compat) >= 0;
}
int fwnode_property_get_reference_args(const struct fwnode_handle *fwnode, int fwnode_property_get_reference_args(const struct fwnode_handle *fwnode,
const char *prop, const char *nargs_prop, const char *prop, const char *nargs_prop,
unsigned int nargs, unsigned int index, unsigned int nargs, unsigned int index,
......
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