Commit 92b0cba4 authored by Michael Cheng's avatar Michael Cheng Committed by Matt Roper

drm/i915/gt: Re-work reset_csb

Use drm_clflush_virt_range instead of directly invoking clflush. This
will prevent compiler errors when building for non-x86 architectures.

v2(Michael Cheng): Remove extra clflush

v3(Michael Cheng): Remove memory barrier since drm_clflush_virt_range
		   takes care of it.

v4(Michael Cheng): Get the size of value and not the size of the pointer
		   when passing in execlists->csb_write. Thanks to Matt
		   Roper for pointing this out.
Signed-off-by: default avatarMichael Cheng <michael.cheng@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220321223819.72833-4-michael.cheng@intel.com
parent dc040682
...@@ -2952,9 +2952,8 @@ reset_csb(struct intel_engine_cs *engine, struct i915_request **inactive) ...@@ -2952,9 +2952,8 @@ reset_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
{ {
struct intel_engine_execlists * const execlists = &engine->execlists; struct intel_engine_execlists * const execlists = &engine->execlists;
mb(); /* paranoia: read the CSB pointers from after the reset */ drm_clflush_virt_range(execlists->csb_write,
clflush(execlists->csb_write); sizeof(execlists->csb_write[0]));
mb();
inactive = process_csb(engine, inactive); /* drain preemption events */ inactive = process_csb(engine, inactive); /* drain preemption events */
......
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