Commit 92df3a9b authored by Michael Krummsdorf's avatar Michael Krummsdorf Committed by Stephen Boyd

clk: qoriq: add LS1021A core pll mux options

This allows to clock the cores with 1 GHz, 500 MHz and 250 MHz.
Signed-off-by: default avatarMichael Krummsdorf <michael.krummsdorf@tq-group.com>
Signed-off-by: default avatarMatthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20200610113837.27117-1-matthias.schiffer@ew.tq-group.comSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent b3a9e3b9
...@@ -244,6 +244,14 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = { ...@@ -244,6 +244,14 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = {
}, },
}; };
static const struct clockgen_muxinfo ls1021a_cmux = {
{
{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
{ CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
{ CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
}
};
static const struct clockgen_muxinfo ls1028a_hwa1 = { static const struct clockgen_muxinfo ls1028a_hwa1 = {
{ {
{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 }, { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
...@@ -577,7 +585,7 @@ static const struct clockgen_chipinfo chipinfo[] = { ...@@ -577,7 +585,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
{ {
.compat = "fsl,ls1021a-clockgen", .compat = "fsl,ls1021a-clockgen",
.cmux_groups = { .cmux_groups = {
&t1023_cmux &ls1021a_cmux
}, },
.cmux_to_group = { .cmux_to_group = {
0, -1 0, -1
......
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