HID: amd_sfh: Implement SFH1.1 functionality

Newer AMD SOCs use SFH1.1 memory access with new PCI-id. Hence add new
sfh1_1 sub directory to implement SFH1.1 functionality by defining new
PCI id, interface functions, descriptor functions and handlers which
invokes sfh1.1.
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>

drivers/hid/amd-sfh-hid/Makefile

@@ -9,5 +9,8 @@ amd_sfh-objs := amd_sfh_hid.o
 amd_sfh-objs += amd_sfh_client.o
 amd_sfh-objs += amd_sfh_pcie.o
 amd_sfh-objs += hid_descriptor/amd_sfh_hid_desc.o
+amd_sfh-objs += sfh1_1/amd_sfh_init.o
+amd_sfh-objs += sfh1_1/amd_sfh_interface.o
+amd_sfh-objs += sfh1_1/amd_sfh_desc.o
 
 ccflags-y += -I $(srctree)/$(src)/

drivers/hid/amd-sfh-hid/amd_sfh_common.h

@@ -14,6 +14,7 @@
 #include "amd_sfh_hid.h"
 
 #define PCI_DEVICE_ID_AMD_MP2		0x15E4
+#define PCI_DEVICE_ID_AMD_MP2_1_1	0x164A
 
 #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
 #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
@@ -40,6 +41,8 @@ struct amd_mp2_dev {
 	struct pci_dev *pdev;
 	struct amdtp_cl_data *cl_data;
 	void __iomem *mmio;
+	void __iomem *vsbase;
+	const struct amd_sfh1_1_ops *sfh1_1_ops;
 	struct amd_mp2_ops *mp2_ops;
 	struct amd_input_data in_data;
 	/* mp2 active control status */

drivers/hid/amd-sfh-hid/amd_sfh_pcie.c

@@ -19,6 +19,7 @@
 #include <linux/slab.h>
 
 #include "amd_sfh_pcie.h"
+#include "sfh1_1/amd_sfh_init.h"
 
 #define DRIVER_NAME	"pcie_mp2_amd"
 #define DRIVER_DESC	"AMD(R) PCIe MP2 Communication Driver"
@@ -318,6 +319,14 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
 	if (!privdata->cl_data)
 		return -ENOMEM;
 
+	privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data;
+	if (privdata->sfh1_1_ops) {
+		rc = privdata->sfh1_1_ops->init(privdata);
+		if (rc)
+			return rc;
+		goto init_done;
+	}
+
 	mp2_select_ops(privdata);
 
 	rc = amd_sfh_irq_init(privdata);
@@ -333,6 +342,7 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
 		return rc;
 	}
 
+init_done:
 	amd_sfh_clear_intr(privdata);
 
 	return devm_add_action_or_reset(&pdev->dev, privdata->mp2_ops->remove, privdata);
@@ -361,6 +371,8 @@ static SIMPLE_DEV_PM_OPS(amd_mp2_pm_ops, amd_mp2_pci_suspend,
 
 static const struct pci_device_id amd_mp2_pci_tbl[] = {
 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2) },
+	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2_1_1),
+	  .driver_data = (kernel_ulong_t)&sfh1_1_ops },
 	{ }
 };
 MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c

+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * AMD MP2 1.1 communication driver
+ *
+ * Copyright (c) 2022, Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/hid.h>
+
+#include "amd_sfh_init.h"
+#include "amd_sfh_interface.h"
+#include "../hid_descriptor/amd_sfh_hid_desc.h"
+
+static int amd_sfh_get_sensor_num(struct amd_mp2_dev *mp2, u8 *sensor_id)
+{
+	struct sfh_sensor_list *slist;
+	struct sfh_base_info binfo;
+	int num_of_sensors = 0;
+	int i;
+
+	memcpy_fromio(&binfo, mp2->vsbase, sizeof(struct sfh_base_info));
+	slist = &binfo.sbase.s_list;
+
+	for (i = 0; i < MAX_IDX; i++) {
+		switch (i) {
+		case ACCEL_IDX:
+		case GYRO_IDX:
+		case MAG_IDX:
+		case ALS_IDX:
+		case HPD_IDX:
+			if (BIT(i) & slist->sl.sensors)
+				sensor_id[num_of_sensors++] = i;
+			break;
+		}
+	}
+
+	return num_of_sensors;
+}
+
+static u32 amd_sfh_wait_for_response(struct amd_mp2_dev *mp2, u8 sid, u32 cmd_id)
+{
+	if (mp2->mp2_ops->response)
+		return mp2->mp2_ops->response(mp2, sid, cmd_id);
+
+	return 0;
+}
+
+static const char *get_sensor_name(int idx)
+{
+	switch (idx) {
+	case ACCEL_IDX:
+		return "accelerometer";
+	case GYRO_IDX:
+		return "gyroscope";
+	case MAG_IDX:
+		return "magnetometer";
+	case ALS_IDX:
+		return "ALS";
+	case HPD_IDX:
+		return "HPD";
+	default:
+		return "unknown sensor type";
+	}
+}
+
+static int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata)
+{
+	struct amdtp_cl_data *cl_data = privdata->cl_data;
+	int i, status;
+
+	for (i = 0; i < cl_data->num_hid_devices; i++) {
+		if (cl_data->sensor_sts[i] == SENSOR_ENABLED) {
+			privdata->mp2_ops->stop(privdata, cl_data->sensor_idx[i]);
+			status = amd_sfh_wait_for_response
+					(privdata, cl_data->sensor_idx[i], DISABLE_SENSOR);
+			if (status == 0)
+				cl_data->sensor_sts[i] = SENSOR_DISABLED;
+			dev_dbg(&privdata->pdev->dev, "stopping sid 0x%x (%s) status 0x%x\n",
+				cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]),
+				cl_data->sensor_sts[i]);
+		}
+	}
+
+	cancel_delayed_work_sync(&cl_data->work);
+	cancel_delayed_work_sync(&cl_data->work_buffer);
+	amdtp_hid_remove(cl_data);
+
+	return 0;
+}
+
+static int amd_sfh1_1_hid_client_init(struct amd_mp2_dev *privdata)
+{
+	struct amd_input_data *in_data = &privdata->in_data;
+	struct amdtp_cl_data *cl_data = privdata->cl_data;
+	struct amd_mp2_ops *mp2_ops = privdata->mp2_ops;
+	struct amd_mp2_sensor_info info;
+	struct request_list *req_list;
+	u32 feature_report_size;
+	u32 input_report_size;
+	struct device *dev;
+	int rc, i, status;
+	u8 cl_idx;
+
+	req_list = &cl_data->req_list;
+	dev = &privdata->pdev->dev;
+	amd_sfh1_1_set_desc_ops(mp2_ops);
+
+	cl_data->num_hid_devices = amd_sfh_get_sensor_num(privdata, &cl_data->sensor_idx[0]);
+
+	INIT_DELAYED_WORK(&cl_data->work, amd_sfh_work);
+	INIT_DELAYED_WORK(&cl_data->work_buffer, amd_sfh_work_buffer);
+	INIT_LIST_HEAD(&req_list->list);
+	cl_data->in_data = in_data;
+
+	for (i = 0; i < cl_data->num_hid_devices; i++) {
+		cl_data->sensor_sts[i] = SENSOR_DISABLED;
+		cl_data->sensor_requested_cnt[i] = 0;
+		cl_data->cur_hid_dev = i;
+		cl_idx = cl_data->sensor_idx[i];
+
+		cl_data->report_descr_sz[i] = mp2_ops->get_desc_sz(cl_idx, descr_size);
+		if (!cl_data->report_descr_sz[i]) {
+			rc = -EINVAL;
+			goto cleanup;
+		}
+		feature_report_size = mp2_ops->get_desc_sz(cl_idx, feature_size);
+		if (!feature_report_size) {
+			rc = -EINVAL;
+			goto cleanup;
+		}
+		input_report_size =  mp2_ops->get_desc_sz(cl_idx, input_size);
+		if (!input_report_size) {
+			rc = -EINVAL;
+			goto cleanup;
+		}
+		cl_data->feature_report[i] = devm_kzalloc(dev, feature_report_size, GFP_KERNEL);
+		if (!cl_data->feature_report[i]) {
+			rc = -ENOMEM;
+			goto cleanup;
+		}
+		in_data->input_report[i] = devm_kzalloc(dev, input_report_size, GFP_KERNEL);
+		if (!in_data->input_report[i]) {
+			rc = -ENOMEM;
+			goto cleanup;
+		}
+
+		info.sensor_idx = cl_idx;
+
+		cl_data->report_descr[i] =
+			devm_kzalloc(dev, cl_data->report_descr_sz[i], GFP_KERNEL);
+		if (!cl_data->report_descr[i]) {
+			rc = -ENOMEM;
+			goto cleanup;
+		}
+		rc = mp2_ops->get_rep_desc(cl_idx, cl_data->report_descr[i]);
+		if (rc)
+			return rc;
+
+		writel(0, privdata->mmio + AMD_P2C_MSG(0));
+		mp2_ops->start(privdata, info);
+		status = amd_sfh_wait_for_response
+				(privdata, cl_data->sensor_idx[i], ENABLE_SENSOR);
+
+		status = (status == 0) ? SENSOR_ENABLED : SENSOR_DISABLED;
+
+		if (status == SENSOR_ENABLED) {
+			cl_data->sensor_sts[i] = SENSOR_ENABLED;
+			rc = amdtp_hid_probe(i, cl_data);
+			if (rc) {
+				mp2_ops->stop(privdata, cl_data->sensor_idx[i]);
+				status = amd_sfh_wait_for_response
+					(privdata, cl_data->sensor_idx[i], DISABLE_SENSOR);
+				if (status == 0)
+					status = SENSOR_DISABLED;
+				if (status != SENSOR_ENABLED)
+					cl_data->sensor_sts[i] = SENSOR_DISABLED;
+				dev_dbg(dev, "sid 0x%x (%s) status 0x%x\n",
+					cl_data->sensor_idx[i],
+					get_sensor_name(cl_data->sensor_idx[i]),
+					cl_data->sensor_sts[i]);
+				goto cleanup;
+			}
+		}
+		dev_dbg(dev, "sid 0x%x (%s) status 0x%x\n",
+			cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]),
+			cl_data->sensor_sts[i]);
+	}
+
+	schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP));
+	return 0;
+
+cleanup:
+	amd_sfh_hid_client_deinit(privdata);
+	for (i = 0; i < cl_data->num_hid_devices; i++) {
+		devm_kfree(dev, cl_data->feature_report[i]);
+		devm_kfree(dev, in_data->input_report[i]);
+		devm_kfree(dev, cl_data->report_descr[i]);
+	}
+	return rc;
+}
+
+static void amd_sfh_resume(struct amd_mp2_dev *mp2)
+{
+	struct amdtp_cl_data *cl_data = mp2->cl_data;
+	struct amd_mp2_sensor_info info;
+	int i, status;
+
+	for (i = 0; i < cl_data->num_hid_devices; i++) {
+		if (cl_data->sensor_sts[i] == SENSOR_DISABLED) {
+			info.sensor_idx = cl_data->sensor_idx[i];
+			mp2->mp2_ops->start(mp2, info);
+			status = amd_sfh_wait_for_response
+					(mp2, cl_data->sensor_idx[i], ENABLE_SENSOR);
+			if (status == 0)
+				status = SENSOR_ENABLED;
+			if (status == SENSOR_ENABLED)
+				cl_data->sensor_sts[i] = SENSOR_ENABLED;
+			dev_dbg(&mp2->pdev->dev, "resume sid 0x%x (%s) status 0x%x\n",
+				cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]),
+				cl_data->sensor_sts[i]);
+		}
+	}
+
+	schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP));
+	amd_sfh_clear_intr(mp2);
+}
+
+static void amd_sfh_suspend(struct amd_mp2_dev *mp2)
+{
+	struct amdtp_cl_data *cl_data = mp2->cl_data;
+	int i, status;
+
+	for (i = 0; i < cl_data->num_hid_devices; i++) {
+		if (cl_data->sensor_idx[i] != HPD_IDX &&
+		    cl_data->sensor_sts[i] == SENSOR_ENABLED) {
+			mp2->mp2_ops->stop(mp2, cl_data->sensor_idx[i]);
+			status = amd_sfh_wait_for_response
+					(mp2, cl_data->sensor_idx[i], DISABLE_SENSOR);
+			if (status == 0)
+				status = SENSOR_DISABLED;
+			if (status != SENSOR_ENABLED)
+				cl_data->sensor_sts[i] = SENSOR_DISABLED;
+			dev_dbg(&mp2->pdev->dev, "suspend sid 0x%x (%s) status 0x%x\n",
+				cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]),
+				cl_data->sensor_sts[i]);
+		}
+	}
+
+	cancel_delayed_work_sync(&cl_data->work_buffer);
+	amd_sfh_clear_intr(mp2);
+}
+
+static void amd_mp2_pci_remove(void *privdata)
+{
+	struct amd_mp2_dev *mp2 = privdata;
+
+	amd_sfh_hid_client_deinit(privdata);
+	mp2->mp2_ops->stop_all(mp2);
+	pci_intx(mp2->pdev, false);
+	amd_sfh_clear_intr(mp2);
+}
+
+static void amd_sfh_set_ops(struct amd_mp2_dev *mp2)
+{
+	struct amd_mp2_ops *mp2_ops;
+
+	sfh_interface_init(mp2);
+	mp2_ops = mp2->mp2_ops;
+	mp2_ops->clear_intr = amd_sfh_clear_intr_v2,
+	mp2_ops->init_intr = amd_sfh_irq_init_v2,
+	mp2_ops->suspend = amd_sfh_suspend;
+	mp2_ops->resume = amd_sfh_resume;
+	mp2_ops->remove = amd_mp2_pci_remove;
+}
+
+int amd_sfh1_1_init(struct amd_mp2_dev *mp2)
+{
+	u32 phy_base = readl(mp2->mmio + AMD_C2P_MSG(22));
+	struct device *dev = &mp2->pdev->dev;
+	struct sfh_base_info binfo;
+	int rc;
+
+	phy_base <<= 21;
+	if (!devm_request_mem_region(dev, phy_base, 128 * 1024, "amd_sfh")) {
+		dev_err(dev, "can't reserve mmio registers\n");
+		return -ENOMEM;
+	}
+
+	mp2->vsbase = devm_ioremap(dev, phy_base, 128 * 1024);
+	if (!mp2->vsbase) {
+		dev_err(dev, "failed to remap vsbase\n");
+		return -ENOMEM;
+	}
+
+	/* Before accessing give time for SFH firmware for processing configuration */
+	msleep(5000);
+
+	memcpy_fromio(&binfo, mp2->vsbase, sizeof(struct sfh_base_info));
+	if (binfo.sbase.fw_info.fw_ver == 0 || binfo.sbase.s_list.sl.sensors == 0) {
+		dev_err(dev, "failed to get sensors\n");
+		return -EOPNOTSUPP;
+	}
+	dev_dbg(dev, "firmware version 0x%x\n", binfo.sbase.fw_info.fw_ver);
+
+	amd_sfh_set_ops(mp2);
+
+	rc = amd_sfh_irq_init(mp2);
+	if (rc) {
+		dev_err(dev, "amd_sfh_irq_init failed\n");
+		return rc;
+	}
+
+	rc = amd_sfh1_1_hid_client_init(mp2);
+	if (rc) {
+		dev_err(dev, "amd_sfh1_1_hid_client_init failed\n");
+		return rc;
+	}
+
+	return rc;
+}

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.h

+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * AMD MP2 1.1 initialization structures
+ *
+ * Copyright (c) 2022, Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
+ */
+
+#ifndef AMD_SFH_INIT_H
+#define AMD_SFH_INIT_H
+
+#include "../amd_sfh_common.h"
+
+struct amd_sfh1_1_ops {
+	int (*init)(struct amd_mp2_dev *mp2);
+};
+
+int amd_sfh1_1_init(struct amd_mp2_dev *mp2);
+
+static const struct amd_sfh1_1_ops __maybe_unused sfh1_1_ops = {
+	.init = amd_sfh1_1_init,
+};
+
+#endif

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c

+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * AMD MP2 1.1 communication interfaces
+ *
+ * Copyright (c) 2022, Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
+ */
+#include <linux/iopoll.h>
+#include "amd_sfh_interface.h"
+
+static int amd_sfh_wait_response(struct amd_mp2_dev *mp2, u8 sid, u32 cmd_id)
+{
+	struct sfh_cmd_response cmd_resp;
+
+	/* Get response with status within a max of 1600 ms timeout */
+	if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,
+				(cmd_resp.response.response == 0 &&
+				cmd_resp.response.cmd_id == cmd_id && (sid == 0xff ||
+				cmd_resp.response.sensor_id == sid)), 500, 1600000))
+		return cmd_resp.response.response;
+
+	return -1;
+}
+
+static void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
+{
+	struct sfh_cmd_base cmd_base;
+
+	cmd_base.ul = 0;
+	cmd_base.cmd.cmd_id = ENABLE_SENSOR;
+	cmd_base.cmd.intr_disable = 0;
+	cmd_base.cmd.sensor_id = info.sensor_idx;
+
+	writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0));
+}
+
+static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)
+{
+	struct sfh_cmd_base cmd_base;
+
+	cmd_base.ul = 0;
+	cmd_base.cmd.cmd_id = DISABLE_SENSOR;
+	cmd_base.cmd.intr_disable = 0;
+	cmd_base.cmd.sensor_id = sensor_idx;
+
+	writeq(0x0, privdata->mmio + AMD_C2P_MSG(1));
+	writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0));
+}
+
+static void amd_stop_all_sensor(struct amd_mp2_dev *privdata)
+{
+	struct sfh_cmd_base cmd_base;
+
+	cmd_base.ul = 0;
+	cmd_base.cmd.cmd_id = STOP_ALL_SENSORS;
+	cmd_base.cmd.intr_disable = 0;
+
+	writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0));
+}
+
+static struct amd_mp2_ops amd_sfh_ops = {
+	.start = amd_start_sensor,
+	.stop = amd_stop_sensor,
+	.stop_all = amd_stop_all_sensor,
+	.response = amd_sfh_wait_response,
+};
+
+void sfh_interface_init(struct amd_mp2_dev *mp2)
+{
+	mp2->mp2_ops = &amd_sfh_ops;
+}

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.h

+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * AMD MP2 1.1 communication interfaces
+ *
+ * Copyright (c) 2022, Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
+ */
+
+#ifndef AMD_SFH_INTERFACE_H
+#define AMD_SFH_INTERFACE_H
+
+#include "../amd_sfh_common.h"
+
+#define SENSOR_DATA_MEM_SIZE_DEFAULT		256
+#define TOTAL_STATIC_MEM_DEFAULT		1024
+#define OFFSET_SFH_INFO_BASE_DEFAULT		0
+#define OFFSET_SENSOR_DATA_DEFAULT		(OFFSET_SFH_INFO_BASE_DEFAULT + \
+							TOTAL_STATIC_MEM_DEFAULT)
+enum sensor_index {
+	ACCEL_IDX,
+	GYRO_IDX,
+	MAG_IDX,
+	ALS_IDX = 4,
+	HPD_IDX = 5,
+	MAX_IDX = 15,
+};
+
+struct sfh_cmd_base {
+	union {
+		u32 ul;
+		struct {
+			u32 sensor_id		: 4;
+			u32 cmd_id		: 4;
+			u32 sub_cmd_id		: 6;
+			u32 length		: 12;
+			u32 rsvd		: 5;
+			u32 intr_disable	: 1;
+		} cmd;
+	};
+};
+
+struct sfh_cmd_response {
+	union {
+		u32 resp;
+		struct {
+			u32 response	: 8;
+			u32 sensor_id	: 4;
+			u32 cmd_id	: 4;
+			u32 sub_cmd	: 6;
+			u32 rsvd2	: 10;
+		} response;
+	};
+};
+
+struct sfh_platform_info {
+	union {
+		u32 pi;
+		struct {
+			u32 cust_id		: 16;
+			u32 plat_id		: 6;
+			u32 interface_id	: 4;
+			u32 rsvd		: 6;
+		} pinfo;
+	};
+};
+
+struct sfh_firmware_info {
+	union {
+		u32 fw_ver;
+		struct {
+			u32 minor_rev : 8;
+			u32 major_rev : 8;
+			u32 minor_ver : 8;
+			u32 major_ver : 8;
+		} fver;
+	};
+};
+
+struct sfh_sensor_list {
+	union {
+		u32 slist;
+		struct {
+			u32 sensors	: 16;
+			u32 rsvd	: 16;
+		} sl;
+	};
+};
+
+struct sfh_base_info {
+	union {
+		u32 sfh_base[24];
+		struct {
+			struct sfh_platform_info plat_info;
+			struct sfh_firmware_info  fw_info;
+			struct sfh_sensor_list s_list;
+		} sbase;
+	};
+};
+
+struct sfh_common_data {
+	u64 timestamp;
+	u32 intr_cnt;
+	u32 featvalid		: 16;
+	u32 rsvd		: 13;
+	u32 sensor_state	: 3;
+};
+
+struct sfh_float32 {
+	u32 x;
+	u32 y;
+	u32 z;
+};
+
+struct sfh_accel_data {
+	struct sfh_common_data commondata;
+	struct sfh_float32 acceldata;
+	u32 accelstatus;
+};
+
+struct sfh_gyro_data {
+	struct sfh_common_data commondata;
+	struct sfh_float32 gyrodata;
+	u32 result;
+};
+
+struct sfh_mag_data {
+	struct sfh_common_data commondata;
+	struct sfh_float32 magdata;
+	u32 accuracy;
+};
+
+struct sfh_als_data {
+	struct sfh_common_data commondata;
+	u16 lux;
+};
+
+struct hpd_status {
+	union {
+		struct {
+			u32 distance			: 16;
+			u32 probablity			: 8;
+			u32 presence			: 2;
+			u32 rsvd			: 5;
+			u32 state			: 1;
+		} shpd;
+		u32 val;
+	};
+};
+
+void sfh_interface_init(struct amd_mp2_dev *mp2);
+void amd_sfh1_1_set_desc_ops(struct amd_mp2_ops *mp2_ops);
+#endif