Commit 93ef1bb5 authored by Anton Blanchard's avatar Anton Blanchard

ppc64: remove ppc_md.post_irq, clean up do_IRQ

parent e5307bf1
......@@ -238,11 +238,9 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
if(naca->interrupt_controller == IC_OPEN_PIC) {
ppc_md.init_IRQ = openpic_init_IRQ;
ppc_md.get_irq = openpic_get_irq;
ppc_md.post_irq = NULL;
} else {
ppc_md.init_IRQ = xics_init_IRQ;
ppc_md.get_irq = xics_get_irq;
ppc_md.post_irq = NULL;
}
ppc_md.init_ras_IRQ = init_ras_IRQ;
......
......@@ -501,58 +501,55 @@ void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq)
spin_unlock(&desc->lock);
}
int do_IRQ(struct pt_regs *regs, int isfake)
int do_IRQ(struct pt_regs *regs)
{
int cpu = smp_processor_id();
int irq;
struct Paca * paca;
struct ItLpQueue * lpq;
/* if(cpu) udbg_printf("Entering do_IRQ\n"); */
int irq, first = 1;
#ifdef CONFIG_PPC_ISERIES
struct Paca *paca;
struct ItLpQueue *lpq;
#endif
irq_enter(cpu);
irq_enter(cpu);
if ( _machine != _MACH_iSeries ) {
/* every arch is required to have a get_irq -- Cort */
irq = ppc_md.get_irq( regs );
if ( irq >= 0 ) {
ppc_irq_dispatch_handler( regs, irq );
if (ppc_md.post_irq)
ppc_md.post_irq( regs, irq );
} else {
/* -2 means ignore, already handled */
if (irq != -2) {
printk(KERN_DEBUG "Bogus interrupt %d from PC = %lx\n",
irq, regs->nip);
ppc_spurious_interrupts++;
}
}
}
/* if on iSeries partition */
else {
paca = (struct Paca *)mfspr(SPRG3);
#ifdef CONFIG_PPC_ISERIES
paca = get_paca();
#ifdef CONFIG_SMP
if ( paca->xLpPaca.xIntDword.xFields.xIpiCnt ) {
paca->xLpPaca.xIntDword.xFields.xIpiCnt = 0;
iSeries_smp_message_recv( regs );
}
if (paca->xLpPaca.xIntDword.xFields.xIpiCnt) {
paca->xLpPaca.xIntDword.xFields.xIpiCnt = 0;
iSeries_smp_message_recv(regs);
}
#endif /* CONFIG_SMP */
lpq = paca->lpQueuePtr;
if ( lpq && ItLpQueue_isLpIntPending( lpq ) )
lpEvent_count += ItLpQueue_process( lpq, regs );
lpq = paca->lpQueuePtr;
if (lpq && ItLpQueue_isLpIntPending(lpq))
lpEvent_count += ItLpQueue_process(lpq, regs);
#else
/*
* Every arch is required to implement ppc_md.get_irq.
* This function will either return an irq number or -1 to
* indicate there are no more pending. But the first time
* through the loop this means there wasn't an IRQ pending.
* The value -2 is for buggy hardware and means that this IRQ
* has already been handled. -- Tom
*/
while ((irq = ppc_md.get_irq(regs)) >= 0) {
ppc_irq_dispatch_handler(regs, irq);
first = 0;
}
if (irq != -2 && first)
/* That's not SMP safe ... but who cares ? */
ppc_spurious_interrupts++;
#endif
irq_exit(cpu);
if ( _machine == _MACH_iSeries ) {
if ( paca->xLpPaca.xIntDword.xFields.xDecrInt ) {
paca->xLpPaca.xIntDword.xFields.xDecrInt = 0;
/* Signal a fake decrementer interrupt */
timer_interrupt( regs );
}
#ifdef CONFIG_PPC_ISERIES
if (paca->xLpPaca.xIntDword.xFields.xDecrInt) {
paca->xLpPaca.xIntDword.xFields.xDecrInt = 0;
/* Signal a fake decrementer interrupt */
timer_interrupt(regs);
}
#endif
if (softirq_pending(cpu))
do_softirq();
......
......@@ -47,7 +47,6 @@ static int broken_ipi_registers;
OpenPIC_SourcePtr ISU[OPENPIC_MAX_ISU];
static void openpic_end_irq(unsigned int irq_nr);
static void openpic_ack_irq(unsigned int irq_nr);
static void openpic_set_affinity(unsigned int irq_nr, unsigned long cpumask);
struct hw_interrupt_type open_pic = {
......@@ -56,14 +55,13 @@ struct hw_interrupt_type open_pic = {
NULL,
openpic_enable_irq,
openpic_disable_irq,
openpic_ack_irq,
NULL,
openpic_end_irq,
openpic_set_affinity
};
#ifdef CONFIG_SMP
static void openpic_end_ipi(unsigned int irq_nr);
static void openpic_ack_ipi(unsigned int irq_nr);
static void openpic_enable_ipi(unsigned int irq_nr);
static void openpic_disable_ipi(unsigned int irq_nr);
......@@ -73,9 +71,9 @@ struct hw_interrupt_type open_pic_ipi = {
NULL,
openpic_enable_ipi,
openpic_disable_ipi,
openpic_ack_ipi,
NULL,
openpic_end_ipi,
0
NULL
};
#endif /* CONFIG_SMP */
......@@ -756,13 +754,6 @@ static inline void openpic_set_sense(u_int irq, int sense)
(sense ? OPENPIC_SENSE_LEVEL : 0));
}
/* No spinlocks, should not be necessary with the OpenPIC
* (1 register = 1 interrupt and we have the desc lock).
*/
static void openpic_ack_irq(unsigned int irq_nr)
{
}
static void openpic_end_irq(unsigned int irq_nr)
{
if ((irq_desc[irq_nr].status & IRQ_LEVEL) != 0)
......@@ -775,10 +766,6 @@ static void openpic_set_affinity(unsigned int irq_nr, unsigned long cpumask)
}
#ifdef CONFIG_SMP
static void openpic_ack_ipi(unsigned int irq_nr)
{
}
static void openpic_end_ipi(unsigned int irq_nr)
{
/* IPIs are marked IRQ_PER_CPU. This has the side effect of
......
......@@ -233,9 +233,9 @@ xics_get_irq(struct pt_regs *regs)
}
} else if( vec == XICS_IRQ_SPURIOUS ) {
irq = -1;
printk("spurious PPC interrupt!\n");
} else
} else {
irq = real_irq_to_virt(vec) + XICS_IRQ_OFFSET;
}
return irq;
}
......
......@@ -78,7 +78,6 @@ struct machdep_calls {
void (*init_IRQ)(void);
void (*init_ras_IRQ)(void);
int (*get_irq)(struct pt_regs *);
void (*post_irq)( struct pt_regs *, int );
/* A general init function, called by ppc_init in init/main.c.
May be NULL. */
......
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