Commit 944d01c5 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-for-v4.12/dt-v2-signed' of...

Merge tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren:

- Add hecc node for am35x

- Add onenand support for omap3-igep

- Add bluetooth binding for n900/n9/n950

- Configure clocks and SATA for dm81xx

- Update operating points tables for am33xx, am43xx and dra7

- Update SPI flash documentation for w25q64

- Configure SPI NOR for am335x-icev2

- Mux uart0 for am437x-gp-evm

- Add thermal zones for omap3, omap4, omap5, dra7

- Configure LEDs for am335x-baltos

- A series of droid 4 changes to configure various devices
  such as keypad, regulators, gpio-keys, rtc, power button,
  compass, accelerometer, touchscreen, backlight, poweroff,
  tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD

* tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits)
  ARM: dts: am335x-baltos: add LED support
  ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator
  ARM: dts: OMAP4460: Thermal: Add slope and offset values
  ARM: dts: OMAP443x: Thermal: Add slope and offset values
  ARM: dts: OMAP5: Thermal: Add slope and offset values
  ARM: dts: DRA7: Thermal: Add slope and offset values
  ARM: dts: omap3: Add cpu_thermal zone
  ARM: dts: am437x-gp-evm: Add pinmux for uart0
  ARM: dts: am335x-icev2: Add SPI based NOR
  Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes
  ARM: dts: dra7: Add updated operating-points-v2 table for cpu
  ARM: dts: am4372: Update operating-points-v2 table for cpu
  ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
  ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
  ARM: dts: dm8168-evm: add SATA node
  ARM: dts: dm8168-evm: add the external reference clock for SATA
  ARM: dts: N9/N950: add bluetooth
  ARM: dts: N900: Add bluetooth
  ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed
  ARM: dts: motorola-cpcap-mapphone: add LEDs
  ...
parents 5ea67992 da72e493
...@@ -40,6 +40,7 @@ Required properties: ...@@ -40,6 +40,7 @@ Required properties:
w25x80 w25x80
w25x32 w25x32
w25q32 w25q32
w25q64
w25q32dw w25q32dw
w25q80bl w25q80bl
w25q128 w25q128
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
/dts-v1/; /dts-v1/;
#include "am335x-baltos.dtsi" #include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"
/ { / {
model = "OnRISC Baltos iR 2110"; model = "OnRISC Baltos iR 2110";
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
/dts-v1/; /dts-v1/;
#include "am335x-baltos.dtsi" #include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"
/ { / {
model = "OnRISC Baltos iR 3220"; model = "OnRISC Baltos iR 3220";
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
/dts-v1/; /dts-v1/;
#include "am335x-baltos.dtsi" #include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"
/ { / {
model = "OnRISC Baltos iR 5221"; model = "OnRISC Baltos iR 5221";
......
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* VScom OnRISC
* http://www.vscom.de
*/
/*#include "am33xx.dtsi"*/
/ {
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds>;
compatible = "gpio-leds";
power {
label = "onrisc:red:power";
linux,default-trigger = "default-on";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan {
label = "onrisc:blue:wlan";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
app {
label = "onrisc:green:app";
gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&am33xx_pinmux {
user_leds: pinmux_user_leds {
pinctrl-single,pins = <
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_col.gpio3_0 PWR LED */
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd3.gpio0_16 WLAN LED */
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd2.gpio0_17 APP LED */
>;
};
};
...@@ -15,3 +15,14 @@ / { ...@@ -15,3 +15,14 @@ / {
model = "TI AM335x BeagleBone Black"; model = "TI AM335x BeagleBone Black";
compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
}; };
&cpu0_opp_table {
/*
* All PG 2.0 silicon may not support 1GHz but some of the early
* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
* to support 1GHz OPP so enable it for PG 2.0 on this board.
*/
oppnitro@1000000000 {
opp-supported-hw = <0x06 0x0100>;
};
};
...@@ -245,6 +245,39 @@ sn65hvs882@1 { ...@@ -245,6 +245,39 @@ sn65hvs882@1 {
spi-max-frequency = <1000000>; spi-max-frequency = <1000000>;
spi-cpol; spi-cpol;
}; };
spi_nor: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q64", "jedec,spi-nor";
spi-max-frequency = <80000000>;
m25p,fast-read;
reg = <0>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x80000>;
read-only;
};
partition@1 {
label = "u-boot";
reg = <0x80000 0x100000>;
read-only;
};
partition@2 {
label = "u-boot-env";
reg = <0x180000 0x20000>;
read-only;
};
partition@3 {
label = "misc";
reg = <0x1A0000 0x660000>;
};
};
}; };
&tscadc { &tscadc {
......
...@@ -46,19 +46,7 @@ cpu@0 { ...@@ -46,19 +46,7 @@ cpu@0 {
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
/* operating-points-v2 = <&cpu0_opp_table>;
* To consider voltage drop between PMIC and SoC,
* tolerance value is reduced to 2% from 4% and
* voltage value is increased as a precaution.
*/
operating-points = <
/* kHz uV */
720000 1285000
600000 1225000
500000 1125000
275000 1125000
>;
voltage-tolerance = <2>; /* 2 percentage */
clocks = <&dpll_mpu_ck>; clocks = <&dpll_mpu_ck>;
clock-names = "cpu"; clock-names = "cpu";
...@@ -67,6 +55,79 @@ cpu@0 { ...@@ -67,6 +55,79 @@ cpu@0 {
}; };
}; };
cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
/*
* The three following nodes are marked with opp-suspend
* because the can not be enabled simultaneously on a
* single SoC.
*/
opp50@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <950000 931000 969000>;
opp-supported-hw = <0x06 0x0010>;
opp-suspend;
};
opp100@275000000 {
opp-hz = /bits/ 64 <275000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0x00FF>;
opp-suspend;
};
opp100@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0020>;
opp-suspend;
};
opp100@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp100@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0040>;
};
opp120@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp120@720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x06 0x0080>;
};
oppturbo@720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x01 0xFFFF>;
};
oppturbo@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x06 0x0100>;
};
oppnitro@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1325000 1298500 1351500>;
opp-supported-hw = <0x04 0x0200>;
};
};
pmu { pmu {
compatible = "arm,cortex-a8-pmu"; compatible = "arm,cortex-a8-pmu";
interrupts = <3>; interrupts = <3>;
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
/ { / {
aliases { aliases {
serial3 = &uart4; serial3 = &uart4;
can = &hecc;
}; };
ocp@68000000 { ocp@68000000 {
...@@ -72,6 +73,17 @@ omap3_pmx_core2: pinmux@480025d8 { ...@@ -72,6 +73,17 @@ omap3_pmx_core2: pinmux@480025d8 {
pinctrl-single,register-width = <16>; pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>; pinctrl-single,function-mask = <0xff1f>;
}; };
hecc: can@5c050000 {
compatible = "ti,am3517-hecc";
status = "disabled";
reg = <0x5c050000 0x80>,
<0x5c053000 0x180>,
<0x5c052000 0x200>;
reg-names = "hecc", "hecc-ram", "mbx";
interrupts = <24>;
clocks = <&hecc_ck>;
};
}; };
}; };
......
...@@ -50,15 +50,14 @@ cpu: cpu@0 { ...@@ -50,15 +50,14 @@ cpu: cpu@0 {
clock-names = "cpu"; clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
ti,syscon-rev = <&scm_conf 0x600>;
clock-latency = <300000>; /* From omap-cpufreq driver */ clock-latency = <300000>; /* From omap-cpufreq driver */
}; };
}; };
cpu0_opp_table: opp_table0 { cpu0_opp_table: opp-table {
compatible = "operating-points-v2"; compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
opp50@300000000 { opp50@300000000 {
opp-hz = /bits/ 64 <300000000>; opp-hz = /bits/ 64 <300000000>;
......
...@@ -501,6 +501,21 @@ AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */ ...@@ -501,6 +501,21 @@ AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */ AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
>; >;
}; };
uart0_pins_default: uart0_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
AM4372_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_default>;
}; };
&i2c0 { &i2c0 {
......
...@@ -25,6 +25,12 @@ vmmcsd_fixed: fixedregulator0 { ...@@ -25,6 +25,12 @@ vmmcsd_fixed: fixedregulator0 {
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
}; };
sata_refclk: fixedclock0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
}; };
&dm816x_pinmux { &dm816x_pinmux {
...@@ -173,3 +179,7 @@ &usb1 { ...@@ -173,3 +179,7 @@ &usb1 {
pinctrl-0 = <&usb1_pins>; pinctrl-0 = <&usb1_pins>;
mentor,multipoint = <0>; mentor,multipoint = <0>;
}; };
&sata {
clocks = <&sysclk5_ck>, <&sata_refclk>;
};
...@@ -293,6 +293,13 @@ eth1: ethernet@4a120000 { ...@@ -293,6 +293,13 @@ eth1: ethernet@4a120000 {
phy-handle = <&phy1>; phy-handle = <&phy1>;
}; };
sata: sata@4a140000 {
compatible = "ti,dm816-ahci";
reg = <0x4a140000 0x10000>;
interrupts = <16>;
ti,hwmods = "sata";
};
mcspi1: spi@48030000 { mcspi1: spi@48030000 {
compatible = "ti,omap4-mcspi"; compatible = "ti,omap4-mcspi";
reg = <0x48030000 0x1000>; reg = <0x48030000 0x1000>;
......
...@@ -81,11 +81,7 @@ cpu0: cpu@0 { ...@@ -81,11 +81,7 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <0>; reg = <0>;
operating-points = < operating-points-v2 = <&cpu0_opp_table>;
/* kHz uV */
1000000 1060000
1176000 1160000
>;
clocks = <&dpll_mpu_ck>; clocks = <&dpll_mpu_ck>;
clock-names = "cpu"; clock-names = "cpu";
...@@ -99,6 +95,24 @@ cpu0: cpu@0 { ...@@ -99,6 +95,24 @@ cpu0: cpu@0 {
}; };
}; };
cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_wkup>;
opp_nom@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1060000 850000 1150000>;
opp-supported-hw = <0xFF 0x01>;
opp-suspend;
};
opp_od@1176000000 {
opp-hz = /bits/ 64 <1176000000>;
opp-microvolt = <1160000 885000 1160000>;
opp-supported-hw = <0xFF 0x02>;
};
};
/* /*
* The soc node represents the soc top level view. It is used for IPs * The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself. * that are not memory mapped in the MPU view or for the MPU itself.
...@@ -1982,6 +1996,23 @@ thermal_zones: thermal-zones { ...@@ -1982,6 +1996,23 @@ thermal_zones: thermal-zones {
&cpu_thermal { &cpu_thermal {
polling-delay = <500>; /* milliseconds */ polling-delay = <500>; /* milliseconds */
coefficients = <0 2000>;
};
&gpu_thermal {
coefficients = <0 2000>;
};
&core_thermal {
coefficients = <0 2000>;
};
&dspeve_thermal {
coefficients = <0 2000>;
};
&iva_thermal {
coefficients = <0 2000>;
}; };
/include/ "dra7xx-clocks.dtsi" /include/ "dra7xx-clocks.dtsi"
...@@ -17,6 +17,7 @@ cpu@1 { ...@@ -17,6 +17,7 @@ cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <1>; reg = <1>;
operating-points-v2 = <&cpu0_opp_table>;
}; };
}; };
...@@ -79,6 +80,10 @@ mmu1_dsp2: mmu@41502000 { ...@@ -79,6 +80,10 @@ mmu1_dsp2: mmu@41502000 {
}; };
}; };
&cpu0_opp_table {
opp-shared;
};
&dss { &dss {
reg = <0x58000000 0x80>, reg = <0x58000000 0x80>,
<0x58004054 0x4>, <0x58004054 0x4>,
......
/*
* Common CPCAP configuration used on Motorola phones
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
&mcspi1 {
cpcap: pmic@0 {
compatible = "motorola,cpcap", "st,6556002";
reg = <0>; /* cs0 */
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <3000000>;
spi-cs-high;
cpcap_regulator: regulator {
compatible = "motorola,mapphone-cpcap-regulator";
cpcap_regulators: regulators {
};
};
cpcap_rtc: rtc {
compatible = "motorola,cpcap-rtc";
interrupt-parent = <&cpcap>;
interrupts = <39 IRQ_TYPE_NONE>, <26 IRQ_TYPE_NONE>;
};
power_button: button {
compatible = "motorola,cpcap-pwrbutton";
interrupts = <23 IRQ_TYPE_NONE>;
};
led_red: led-red {
compatible = "motorola,cpcap-led-red";
vdd-supply = <&sw5>;
label = "status-led:red";
};
led_green: led-green {
compatible = "motorola,cpcap-led-green";
vdd-supply = <&sw5>;
label = "status-led:green";
};
led_blue: led-blue {
compatible = "motorola,cpcap-led-blue";
vdd-supply = <&sw5>;
label = "status-led:blue";
};
led_adl: led-adl {
compatible = "motorola,cpcap-led-adl";
vdd-supply = <&sw5>;
label = "button-backlight";
};
led_cp: led-cp {
compatible = "motorola,cpcap-led-cp";
vdd-supply = <&sw5>;
label = "shift-key-light";
};
};
};
&cpcap_regulators {
sw5: SW5 {
regulator-min-microvolt = <5050000>;
regulator-max-microvolt = <5050000>;
regulator-enable-ramp-delay = <50000>;
regulator-boot-on;
};
vcam: VCAM {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-enable-ramp-delay = <1000>;
};
/* Used by DSS */
vcsi: VCSI {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <1000>;
regulator-boot-on;
};
vdac: VDAC {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <1000>;
};
vdig: VDIG {
regulator-min-microvolt = <1875000>;
regulator-max-microvolt = <1875000>;
regulator-enable-ramp-delay = <1000>;
};
vfuse: VFUSE {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3150000>;
regulator-enable-ramp-delay = <1000>;
};
vhvio: VHVIO {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
regulator-enable-ramp-delay = <1000>;
regulator-always-on;
};
/* Used by eMMC at mmc2 */
vsdio: VSDIO {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-enable-ramp-delay = <1000>;
};
vpll: VPLL {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <100>;
};
vrf1: VRF1 {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
regulator-enable-ramp-delay = <1000>;
};
vrf2: VRF2 {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
regulator-enable-ramp-delay = <1000>;
};
vrfref: VRFREF {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2775000>;
regulator-enable-ramp-delay = <100>;
};
vwlan1: VWLAN1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1900000>;
regulator-enable-ramp-delay = <1000>;
};
/* Used by micro-SDIO at mmc1 */
vwlan2: VWLAN2 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-enable-ramp-delay = <1000>;
};
vsim: VSIM {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-enable-ramp-delay = <1000>;
};
vsimcard: VSIMCARD {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-enable-ramp-delay = <1000>;
};
vvib: VVIB {
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <3000000>;
regulator-enable-ramp-delay = <500>;
};
vusb: VUSB {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-enable-ramp-delay = <1000>;
};
vaudio: VAUDIO {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
regulator-enable-ramp-delay = <1000>;
};
};
/*
* Device Tree Source for OMAP3 SoC CPU thermal
*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <dt-bindings/thermal/thermal.h>
cpu_thermal: cpu_thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
coefficients = <0 20000>;
/* sensor ID */
thermal-sensors = <&bandgap 0>;
};
...@@ -37,6 +37,13 @@ vdd33: regulator-vdd33 { ...@@ -37,6 +37,13 @@ vdd33: regulator-vdd33 {
}; };
&omap3_pmx_core { &omap3_pmx_core {
gpmc_pins: pinmux_gpmc_pins {
pinctrl-single,pins = <
/* OneNAND seems to require PIN_INPUT on clock. */
OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
>;
};
uart1_pins: pinmux_uart1_pins { uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
...@@ -98,6 +105,9 @@ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */ ...@@ -98,6 +105,9 @@ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
}; };
&gpmc { &gpmc {
pinctrl-names = "default";
pinctrl-0 = <&gpmc_pins>;
nand@0,0 { nand@0,0 {
compatible = "ti,omap2-nand"; compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
...@@ -126,6 +136,48 @@ nand@0,0 { ...@@ -126,6 +136,48 @@ nand@0,0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
status = "okay";
};
onenand@0,0 {
compatible = "ti,omap2-onenand";
reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
gpmc,sync-read;
gpmc,sync-write;
gpmc,burst-length = <16>;
gpmc,burst-read;
gpmc,burst-wrap;
gpmc,burst-write;
gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <87>;
gpmc,cs-wr-off-ns = <87>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <10>;
gpmc,adv-wr-off-ns = <10>;
gpmc,oe-on-ns = <15>;
gpmc,oe-off-ns = <87>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <87>;
gpmc,rd-cycle-ns = <112>;
gpmc,wr-cycle-ns = <112>;
gpmc,access-ns = <81>;
gpmc,page-burst-access-ns = <15>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,clk-activation-ns = <5>;
gpmc,wr-data-mux-bus-ns = <30>;
gpmc,wr-access-ns = <81>;
gpmc,sync-clk-ps = <15000>;
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
}; };
}; };
......
...@@ -155,6 +155,13 @@ ir: n900-ir { ...@@ -155,6 +155,13 @@ ir: n900-ir {
compatible = "nokia,n900-ir"; compatible = "nokia,n900-ir";
pwms = <&pwm9 0 26316 0>; /* 38000 Hz */ pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
}; };
/* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
vctcxo: vctcxo {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <38400000>;
};
}; };
&omap3_pmx_core { &omap3_pmx_core {
...@@ -162,8 +169,10 @@ &omap3_pmx_core { ...@@ -162,8 +169,10 @@ &omap3_pmx_core {
uart2_pins: pinmux_uart2_pins { uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */ OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */ OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
>; >;
}; };
...@@ -920,6 +929,8 @@ wl1251@0 { ...@@ -920,6 +929,8 @@ wl1251@0 {
interrupt-parent = <&gpio2>; interrupt-parent = <&gpio2>;
interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */ interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
clocks = <&vctcxo>;
}; };
}; };
...@@ -937,9 +948,17 @@ &uart1 { ...@@ -937,9 +948,17 @@ &uart1 {
}; };
&uart2 { &uart2 {
interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>; pinctrl-0 = <&uart2_pins>;
bcm2048: bluetooth {
compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
clocks = <&vctcxo>;
clock-names = "sysclk";
};
}; };
&uart3 { &uart3 {
......
...@@ -58,6 +58,13 @@ heartbeat { ...@@ -58,6 +58,13 @@ heartbeat {
pinctrl-0 = <&debug_leds>; pinctrl-0 = <&debug_leds>;
}; };
}; };
/* controlled (enabled/disabled) directly by wl1271 */
vctcxo: vctcxo {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <38400000>;
};
}; };
&omap3_pmx_core { &omap3_pmx_core {
...@@ -125,6 +132,15 @@ OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst ...@@ -125,6 +132,15 @@ OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */ OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */
>; >;
}; };
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
>;
};
}; };
&omap3_pmx_core2 { &omap3_pmx_core2 {
...@@ -435,3 +451,19 @@ modem: hsi-client { ...@@ -435,3 +451,19 @@ modem: hsi-client {
&ssi_port2 { &ssi_port2 {
status = "disabled"; status = "disabled";
}; };
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
bluetooth {
compatible = "ti,wl1271-bluetooth-nokia", "nokia,h4p-bluetooth";
reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; /* 26 */
host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
clocks = <&vctcxo>;
clock-names = "sysclk";
};
};
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
/ { / {
cpus { cpus {
cpu@0 { cpu: cpu@0 {
/* OMAP343x/OMAP35xx variants OPP1-5 */ /* OMAP343x/OMAP35xx variants OPP1-5 */
operating-points = < operating-points = <
/* kHz uV */ /* kHz uV */
...@@ -56,12 +56,16 @@ ports { ...@@ -56,12 +56,16 @@ ports {
}; };
}; };
bandgap@48002524 { bandgap: bandgap@48002524 {
reg = <0x48002524 0x4>; reg = <0x48002524 0x4>;
compatible = "ti,omap34xx-bandgap"; compatible = "ti,omap34xx-bandgap";
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <0>;
}; };
}; };
thermal_zones: thermal-zones {
#include "omap3-cpu-thermal.dtsi"
};
}; };
&ssi { &ssi {
......
...@@ -19,7 +19,7 @@ aliases { ...@@ -19,7 +19,7 @@ aliases {
cpus { cpus {
/* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */ /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
cpu@0 { cpu: cpu@0 {
operating-points = < operating-points = <
/* kHz uV */ /* kHz uV */
300000 1012500 300000 1012500
...@@ -88,12 +88,16 @@ ports { ...@@ -88,12 +88,16 @@ ports {
}; };
}; };
bandgap@48002524 { bandgap: bandgap@48002524 {
reg = <0x48002524 0x4>; reg = <0x48002524 0x4>;
compatible = "ti,omap36xx-bandgap"; compatible = "ti,omap36xx-bandgap";
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <0>;
}; };
}; };
thermal_zones: thermal-zones {
#include "omap3-cpu-thermal.dtsi"
};
}; };
/* OMAP3630 needs dss_96m_fck for VENC */ /* OMAP3630 needs dss_96m_fck for VENC */
......
...@@ -5,7 +5,9 @@ ...@@ -5,7 +5,9 @@
*/ */
/dts-v1/; /dts-v1/;
#include <dt-bindings/input/input.h>
#include "omap443x.dtsi" #include "omap443x.dtsi"
#include "motorola-cpcap-mapphone.dtsi"
/ { / {
model = "Motorola Droid 4 XT894"; model = "Motorola Droid 4 XT894";
...@@ -15,6 +17,11 @@ chosen { ...@@ -15,6 +17,11 @@ chosen {
stdout-path = &uart3; stdout-path = &uart3;
}; };
aliases {
display0 = &lcd0;
display1 = &hdmi0;
};
/* /*
* We seem to have only 1021 MB accessible, 1021 - 1022 is locked, * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
* then 1023 - 1024 seems to contain mbm. For SRAM, see the notes * then 1023 - 1024 seems to contain mbm. For SRAM, see the notes
...@@ -25,25 +32,62 @@ memory { ...@@ -25,25 +32,62 @@ memory {
reg = <0x80000000 0x3fd00000>; /* 1021 MB */ reg = <0x80000000 0x3fd00000>; /* 1021 MB */
}; };
/* CPCAP really supports 1650000 to 3400000 range */ /* Poweroff GPIO probably connected to CPCAP */
vmmc: regulator-mmc { gpio-poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&poweroff_gpio>;
pinctrl-names = "default";
gpios = <&gpio2 18 GPIO_ACTIVE_LOW>; /* gpio50 */
};
hdmi0: connector {
compatible = "hdmi-connector";
pinctrl-0 = <&hdmi_hpd_gpio>;
pinctrl-names = "default";
label = "hdmi";
type = "d";
hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; /* gpio63 */
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_out>;
};
};
};
/*
* HDMI 5V regulator probably sourced from battery. Let's keep
* keep this as always enabled for HDMI to work until we've
* figured what the encoder chip is.
*/
hdmi_regulator: regulator-hdmi {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vmmc"; regulator-name = "hdmi";
regulator-min-microvolt = <3000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <5000000>;
gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio59 */
enable-active-high;
regulator-always-on; regulator-always-on;
}; };
/* CPCAP really supports 3000000 to 3100000 range */ /* HS USB Host PHY on PORT 1 */
vemmc: regulator-emmc { hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
};
/* LCD regulator from sw5 source */
lcd_regulator: regulator-lcd {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vemmc"; regulator-name = "lcd";
regulator-min-microvolt = <3000000>; regulator-min-microvolt = <5050000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <5050000>;
regulator-always-on; gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>; /* gpio96 */
enable-active-high;
vin-supply = <&sw5>;
}; };
/* CPCAP really supports 1650000 to 1950000 range */ /* This is probably coming straight from the battery.. */
wl12xx_vmmc: regulator-wl12xx { wl12xx_vmmc: regulator-wl12xx {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vwl1271"; regulator-name = "vwl1271";
...@@ -53,6 +97,83 @@ wl12xx_vmmc: regulator-wl12xx { ...@@ -53,6 +97,83 @@ wl12xx_vmmc: regulator-wl12xx {
startup-delay-us = <70000>; startup-delay-us = <70000>;
enable-active-high; enable-active-high;
}; };
gpio_keys {
compatible = "gpio-keys";
volume_down {
label = "Volume Down";
gpios = <&gpio5 26 GPIO_ACTIVE_LOW>; /* gpio154 */
linux,code = <KEY_VOLUMEDOWN>;
linux,can-disable;
};
slider {
label = "Keypad Slide";
gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio122 */
linux,input-type = <EV_SW>;
linux,code = <SW_KEYPAD_SLIDE>;
linux,can-disable;
};
};
};
&dss {
status = "okay";
};
&gpio6 {
touchscreen_reset {
gpio-hog;
gpios = <13 0>;
output-high;
line-name = "touchscreen-reset";
};
};
&dsi1 {
status = "okay";
vdd-supply = <&vcsi>;
port {
dsi1_out_ep: endpoint {
remote-endpoint = <&lcd0_in>;
lanes = <0 1 2 3 4 5>;
};
};
lcd0: display {
compatible = "panel-dsi-cm";
label = "lcd0";
vddi-supply = <&lcd_regulator>;
reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */
panel-timing {
clock-frequency = <0>; /* Calculated by dsi */
hback-porch = <2>;
hactive = <540>;
hfront-porch = <0>;
hsync-len = <2>;
vback-porch = <1>;
vactive = <960>;
vfront-porch = <0>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd0_in: endpoint {
remote-endpoint = <&dsi1_out_ep>;
};
};
};
}; };
/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
...@@ -60,14 +181,116 @@ &gpmc { ...@@ -60,14 +181,116 @@ &gpmc {
status = "disabled"; status = "disabled";
}; };
&hdmi {
status = "okay";
pinctrl-0 = <&dss_hdmi_pins>;
pinctrl-names = "default";
vdda-supply = <&vdac>;
port {
hdmi_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
lanes = <1 0 3 2 5 4 7 6>;
};
};
};
&i2c1 {
tmp105@48 {
compatible = "ti,tmp105";
reg = <0x48>;
pinctrl-0 = <&tmp105_irq>;
pinctrl-names = "default";
/* kpd_row0.gpio_178 */
interrupts-extended = <&gpio6 18 IRQ_TYPE_EDGE_FALLING
&omap4_pmx_core 0x14e>;
interrupt-names = "irq", "wakeup";
wakeup-source;
};
};
&keypad {
keypad,num-rows = <8>;
keypad,num-columns = <8>;
linux,keymap = <
/* Row 1 */
MATRIX_KEY(0, 2, KEY_1)
MATRIX_KEY(0, 6, KEY_2)
MATRIX_KEY(2, 3, KEY_3)
MATRIX_KEY(0, 7, KEY_4)
MATRIX_KEY(0, 4, KEY_5)
MATRIX_KEY(5, 5, KEY_6)
MATRIX_KEY(0, 1, KEY_7)
MATRIX_KEY(0, 5, KEY_8)
MATRIX_KEY(0, 0, KEY_9)
MATRIX_KEY(1, 6, KEY_0)
/* Row 2 */
MATRIX_KEY(3, 4, KEY_APOSTROPHE)
MATRIX_KEY(7, 6, KEY_Q)
MATRIX_KEY(7, 7, KEY_W)
MATRIX_KEY(7, 2, KEY_E)
MATRIX_KEY(1, 0, KEY_R)
MATRIX_KEY(4, 4, KEY_T)
MATRIX_KEY(1, 2, KEY_Y)
MATRIX_KEY(6, 7, KEY_U)
MATRIX_KEY(2, 2, KEY_I)
MATRIX_KEY(5, 6, KEY_O)
MATRIX_KEY(3, 7, KEY_P)
MATRIX_KEY(6, 5, KEY_BACKSPACE)
/* Row 3 */
MATRIX_KEY(5, 4, KEY_TAB)
MATRIX_KEY(5, 7, KEY_A)
MATRIX_KEY(2, 7, KEY_S)
MATRIX_KEY(7, 0, KEY_D)
MATRIX_KEY(2, 6, KEY_F)
MATRIX_KEY(6, 2, KEY_G)
MATRIX_KEY(6, 6, KEY_H)
MATRIX_KEY(1, 4, KEY_J)
MATRIX_KEY(3, 1, KEY_K)
MATRIX_KEY(2, 1, KEY_L)
MATRIX_KEY(4, 6, KEY_ENTER)
/* Row 4 */
MATRIX_KEY(3, 6, KEY_LEFTSHIFT) /* KEY_CAPSLOCK */
MATRIX_KEY(6, 1, KEY_Z)
MATRIX_KEY(7, 4, KEY_X)
MATRIX_KEY(5, 1, KEY_C)
MATRIX_KEY(1, 7, KEY_V)
MATRIX_KEY(2, 4, KEY_B)
MATRIX_KEY(4, 1, KEY_N)
MATRIX_KEY(1, 1, KEY_M)
MATRIX_KEY(3, 5, KEY_COMMA)
MATRIX_KEY(5, 2, KEY_DOT)
MATRIX_KEY(6, 3, KEY_UP)
MATRIX_KEY(7, 3, KEY_OK)
/* Row 5 */
MATRIX_KEY(2, 5, KEY_LEFTCTRL) /* KEY_LEFTSHIFT */
MATRIX_KEY(4, 5, KEY_LEFTALT) /* SYM */
MATRIX_KEY(6, 0, KEY_MINUS)
MATRIX_KEY(4, 7, KEY_EQUAL)
MATRIX_KEY(1, 5, KEY_SPACE)
MATRIX_KEY(3, 2, KEY_SLASH)
MATRIX_KEY(4, 3, KEY_LEFT)
MATRIX_KEY(5, 3, KEY_DOWN)
MATRIX_KEY(3, 3, KEY_RIGHT)
/* Side buttons, KEY_VOLUMEDOWN and KEY_PWER are on CPCAP? */
MATRIX_KEY(5, 0, KEY_VOLUMEUP)
>;
};
&mmc1 { &mmc1 {
vmmc-supply = <&vmmc>; vmmc-supply = <&vwlan2>;
bus-width = <4>; bus-width = <4>;
cd-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */ cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; /* gpio176 */
}; };
&mmc2 { &mmc2 {
vmmc-supply = <&vemmc>; vmmc-supply = <&vsdio>;
bus-width = <8>; bus-width = <8>;
non-removable; non-removable;
}; };
...@@ -93,12 +316,83 @@ wlcore: wlcore@2 { ...@@ -93,12 +316,83 @@ wlcore: wlcore@2 {
}; };
}; };
&i2c1 {
lm3532@38 {
compatible = "ti,lm3532";
reg = <0x38>;
enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
backlight {
compatible = "ti,lm3532-backlight";
lcd {
led-sources = <0 1 2>;
ramp-up-msec = <1>;
ramp-down-msec = <0>;
};
};
};
};
/*
* REVISIT: Add gpio173 reset pin handling to the driver, see gpio-hog above.
* If the GPIO reset is used, we probably need to have /lib/firmware/maxtouch.fw
* available. See "mxt-app" and "droid4-touchscreen-firmware" tools for more
* information.
*/
&i2c2 {
tsp@4a {
compatible = "atmel,maxtouch";
reg = <0x4a>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
/* gpio_183 with sys_nirq2 pad as wakeup */
interrupts-extended = <&gpio6 23 IRQ_TYPE_EDGE_FALLING
&omap4_pmx_core 0x160>;
interrupt-names = "irq", "wakeup";
wakeup-source;
};
};
/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
&ocmcram { &ocmcram {
status = "disabled"; status = "disabled";
}; };
&omap4_pmx_core { &omap4_pmx_core {
/* hdmi_hpd.gpio_63 */
hdmi_hpd_gpio: pinmux_hdmi_hpd_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
>;
};
/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
dss_hdmi_pins: pinmux_dss_hdmi_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0)
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
>;
};
/* gpmc_ncs0.gpio_50 */
poweroff_gpio: pinmux_poweroff_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
>;
};
/* kpd_row0.gpio_178 */
tmp105_irq: pinmux_tmp105_irq {
pinctrl-single,pins = <
OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins { usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
/* gpio_60 */ /* gpio_60 */
pinctrl-single,pins = < pinctrl-single,pins = <
...@@ -106,6 +400,12 @@ OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) ...@@ -106,6 +400,12 @@ OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
>; >;
}; };
touchscreen_pins: pinmux_touchscreen_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_ulpi_pins: pinmux_usb_ulpi_pins { usb_ulpi_pins: pinmux_usb_ulpi_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7) OMAP4_IOPAD(0x196, MUX_MODE7)
...@@ -180,9 +480,49 @@ &uart3 { ...@@ -180,9 +480,49 @@ &uart3 {
&omap4_pmx_core 0x17c>; &omap4_pmx_core 0x17c>;
}; };
&usbhsehci {
phys = <&hsusb1_phy>;
};
&usbhshost {
port1-mode = "ohci-phy-4pin-dpdm";
port2-mode = "ehci-tll";
};
/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */ /* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
&usb_otg_hs { &usb_otg_hs {
interface-type = <1>; interface-type = <1>;
mode = <3>; mode = <3>;
power = <50>; power = <50>;
}; };
&i2c4 {
ak8975: magnetometer@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
vdd-supply = <&vhvio>;
interrupt-parent = <&gpio6>;
interrupts = <15 IRQ_TYPE_EDGE_RISING>; /* gpio175 */
rotation-matrix = "-1", "0", "0",
"0", "1", "0",
"0", "0", "-1";
};
lis3dh: accelerometer@18 {
compatible = "st,lis3dh-accel";
reg = <0x18>;
vdd-supply = <&vhvio>;
interrupt-parent = <&gpio2>;
interrupts = <2 IRQ_TYPE_EDGE_BOTH>; /* gpio34 */
rotation-matrix = "0", "-1", "0",
"1", "0", "0",
"0", "0", "1";
};
};
...@@ -71,4 +71,8 @@ abb_iva: regulator-abb-iva { ...@@ -71,4 +71,8 @@ abb_iva: regulator-abb-iva {
}; };
&cpu_thermal {
coefficients = <0 20000>;
};
/include/ "omap443x-clocks.dtsi" /include/ "omap443x-clocks.dtsi"
...@@ -90,4 +90,8 @@ abb_iva: regulator-abb-iva { ...@@ -90,4 +90,8 @@ abb_iva: regulator-abb-iva {
}; };
&cpu_thermal {
coefficients = <348 (-9301)>;
};
/include/ "omap446x-clocks.dtsi" /include/ "omap446x-clocks.dtsi"
...@@ -1127,6 +1127,15 @@ abb_mm: regulator-abb-mm { ...@@ -1127,6 +1127,15 @@ abb_mm: regulator-abb-mm {
&cpu_thermal { &cpu_thermal {
polling-delay = <500>; /* milliseconds */ polling-delay = <500>; /* milliseconds */
coefficients = <65 (-1791)>;
}; };
/include/ "omap54xx-clocks.dtsi" /include/ "omap54xx-clocks.dtsi"
&gpu_thermal {
coefficients = <117 (-2992)>;
};
&core_thermal {
coefficients = <0 2000>;
};
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