Commit 94f19d07 authored by Frank Li's avatar Frank Li Committed by Mark Brown

spi: dt-bindings: fsl-dspi: Convert to yaml format

Convert dt-binding spi-fsl-dspi.txt to yaml format.
Use part Vladimir Oltean's work at of
https://lore.kernel.org/linux-spi/20221111224651.577729-1-vladimir.oltean@nxp.com/

Additional changes during convert:
- compatible string "fsl,ls1028a-dspi" can be followed by
fsl,ls1021a-v1.0-dspi.
- Change "dspi0@4002c000" to "spi@4002c000" in example.
- Reorder properties in example.
- Use GIC include in example.
- Deprecated fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay by use common SPI
property.
- Use compatible string 'jedec,spi-nor' in example.
- Split peripheral part to fsl,dspi-peripheral-props.yaml.
- Remove 'interrupts' and 'pinctrl' from required list.
- Update 'bus-num' description.
- Update 'spi-num-chipselects' description by add "cs-gpios don't count
against this number".
- Remove 'big-endian' description.
Co-developed-by: default avatarKuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: default avatarKuldeep Singh <kuldeep.singh@nxp.com>
Co-developed-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Reviewed-by: default avatarVladimir Oltean <olteanv@gmail.com>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20240624-ls_qspi-v4-2-3d1c6f5005bf@nxp.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 52e78777
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/fsl,dspi-peripheral-props.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Peripheral-specific properties for Freescale DSPI controller
maintainers:
- Vladimir Oltean <olteanv@gmail.com>
description:
See spi-peripheral-props.yaml for more info.
properties:
fsl,spi-cs-sck-delay:
deprecated: true
description:
Delay in nanoseconds between activating chip select and the start of
clock signal, at the start of a transfer.
$ref: /schemas/types.yaml#/definitions/uint32
fsl,spi-sck-cs-delay:
deprecated: true
description:
Delay in nanoseconds between stopping the clock signal and
deactivating chip select, at the end of a transfer.
$ref: /schemas/types.yaml#/definitions/uint32
additionalProperties: true
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/fsl,dspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Freescale DSPI controller
maintainers:
- Frank Li <Frank.Li@nxp.com>
properties:
compatible:
oneOf:
- enum:
- fsl,vf610-dspi
- fsl,ls1021a-v1.0-dspi
- fsl,ls1012a-dspi
- fsl,ls1028a-dspi
- fsl,ls1043a-dspi
- fsl,ls1046a-dspi
- fsl,ls1088a-dspi
- fsl,ls2080a-dspi
- fsl,ls2085a-dspi
- fsl,lx2160a-dspi
- items:
- enum:
- fsl,ls1012a-dspi
- fsl,ls1028a-dspi
- fsl,ls1043a-dspi
- fsl,ls1046a-dspi
- fsl,ls1088a-dspi
- const: fsl,ls1021a-v1.0-dspi
- items:
- const: fsl,ls2080a-dspi
- const: fsl,ls2085a-dspi
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: dspi
spi-num-chipselects:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The number of the chip native chipselect signals.
cs-gpios don't count against this number.
big-endian: true
bus-num:
$ref: /schemas/types.yaml#/definitions/uint32
description: SoC-specific identifier for the SPI controller.
required:
- compatible
- reg
- clocks
- clock-names
- spi-num-chipselects
allOf:
- $ref: spi-controller.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/vf610-clock.h>
spi@4002c000 {
compatible = "fsl,vf610-dspi";
reg = <0x4002c000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_DSPI0>;
clock-names = "dspi";
spi-num-chipselects = <5>;
bus-num = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dspi0_1>;
big-endian;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <16000000>;
spi-cpol;
spi-cpha;
spi-cs-setup-delay-ns = <100>;
spi-cs-hold-delay-ns = <50>;
};
};
ARM Freescale DSPI controller
Required properties:
- compatible : must be one of:
"fsl,vf610-dspi",
"fsl,ls1021a-v1.0-dspi",
"fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
"fsl,ls1028a-dspi",
"fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
"fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
"fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
"fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"),
"fsl,ls2085a-dspi",
"fsl,lx2160a-dspi",
- reg : Offset and length of the register set for the device
- interrupts : Should contain SPI controller interrupt
- clocks: from common clock binding: handle to dspi clock.
- clock-names: from common clock binding: Shall be "dspi".
- pinctrl-0: pin control group to be used for this controller.
- pinctrl-names: must contain a "default" entry.
- spi-num-chipselects : the number of the chipselect signals.
Optional property:
- big-endian: If present the dspi device's registers are implemented
in big endian mode.
- bus-num : the slave chip chipselect signal number.
Optional SPI slave node properties:
- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
select and the start of clock signal, at the start of a transfer.
- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
signal and deactivating chip select, at the end of a transfer.
Example:
dspi0@4002c000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,vf610-dspi";
reg = <0x4002c000 0x1000>;
interrupts = <0 67 0x04>;
clocks = <&clks VF610_CLK_DSPI0>;
clock-names = "dspi";
spi-num-chipselects = <5>;
bus-num = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dspi0_1>;
big-endian;
sflash: at26df081a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at26df081a";
spi-max-frequency = <16000000>;
spi-cpol;
spi-cpha;
reg = <0>;
linux,modalias = "m25p80";
modal = "at26df081a";
fsl,spi-cs-sck-delay = <100>;
fsl,spi-sck-cs-delay = <50>;
};
};
......@@ -122,6 +122,7 @@ properties:
allOf:
- $ref: arm,pl022-peripheral-props.yaml#
- $ref: cdns,qspi-nor-peripheral-props.yaml#
- $ref: fsl,dspi-peripheral-props.yaml#
- $ref: samsung,spi-peripheral-props.yaml#
- $ref: nvidia,tegra210-quad-peripheral-props.yaml#
......
......@@ -8708,7 +8708,7 @@ FREESCALE DSPI DRIVER
M: Vladimir Oltean <olteanv@gmail.com>
L: linux-spi@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
F: Documentation/devicetree/bindings/spi/fsl,dspi*.yaml
F: drivers/spi/spi-fsl-dspi.c
F: include/linux/spi/spi-fsl-dspi.h
......
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